The PSEC4 custom integrated circuit was designed for the recording of fast waveforms for use in large-area time-of-flight detector systems. The ASIC has been fabricated using the IBM-8RF 0.13 micron ...CMOS process. On each of 6 analog channels, PSEC4 employs a switched capacitor array (SCA) 256 samples deep, a ramp-compare ADC with 10.5 bits of DC dynamic range, and a serial data readout with the capability of region-of-interest windowing to reduce dead time. The sampling rate can be adjusted between 4 and 15 Gigasamples/second GSa/s on all channels and is servo-controlled on-chip with a low-jitter delay-locked loop (DLL). The input signals are passively coupled on-chip with a -3 dB analog bandwidth of 1.5 GHz. The power consumption in quiescent sampling mode is less than 50 mW/chip; at a sustained trigger and readout rate of 50 kHz the chip draws 100 mW. After fixed-pattern pedestal subtraction, the uncorrected integral non-linearity is 0.15% over an 750 mV dynamic range. With a linearity correction, a full 1 V signal voltage range is available.The sampling timebase has a fixed-pattern non-linearity with an RMS of 13%, which can be corrected for precision waveform feature extraction and timing.
The DIRC front-end electronics chain for BaBar Bailly, P.; Chauveau, J.; Buono, L.Del ...
Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment,
01/1999, Volume:
433, Issue:
1
Journal Article
Peer reviewed
The detector of Internally Reflected Cherenkov light (DIRC) of the BaBar detector (SLAC Stanford, USA) measures better than 1
ns the arrival time of Cherenkov photoelectrons, detected in a 11
000 ...phototubes array and their amplitude spectra. It mainly comprises of 64-channel DIRC Front-End Boards (DFB) equipped with eight full-custom Analog chips performing zero-cross discrimination with 2 mV threshold and pulse shaping, four full-custom Digital TDC chips for timing measurements with 500 ps binning and a readout logic selecting hits in the trigger window, and DIRC Crate Controller cards (DCC) serializing the data collected from up to 16 DFBs onto a 1.2 Gb/s optical link. Extensive test of the pre-production chips have been performed as well as system tests.
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IJS, IMTLJ, KILJ, KISLJ, NUK, SAZU, SBCE, SBJE, UL, UM, UPCLJ, UPUK
The DIRC is a new type of Cherenkov imaging device that will be used for the first time in the BABAR detector at the asymmetric B-factory, PEP-II. It is based on total internal reflection and uses ...long, rectangular bars made from synthetic fused silica as Cherenkov radiator and light guide. The principles of the DIRC ring imaging Cherenkov technique are explained and results from the prototype program are presented. Its choice for the BABAR detector particle identification system is motivated, followed by a discussion of the quartz radiator properties and the detector design
The DIRC, a new type of ring-imaging Cherenkov detector that images internally reflected Cherenkov light, is being constructed as the main hadronic particle identification component of the BABAR ...detector at SLAC. The device makes use of 5 meter long fused silica (colloquially called quartz) bars, which serve both as the Cherenkov radiators and as light pipes for transmitting the light to an array of photo-multiplier tubes. This paper describes a program of research and development-aimed at determining whether bars that meet the stringent requirements of the DIRC can be obtained from commercial sources. The results of studies of bulk absorption of fused silica, surface finish, radiation damage and bulk inhomogeneities are discussed
We present a digital solution for the front-end electronics of high resolution calorimeters at future colliders. It is based on analogue signal compression, high speed
A
D
converters, a fully ...programmable pipeline and a digital signal processing (DSP) chain with local intelligence and system supervision. This digital solution is aimed at providing maximal front-end processing power by performing waveform analysis using DSP methods. For the system integration of the multichannel device a multi-chip, silicon-on-silicon multi-chip module (MCM) has been adopted. This solution allows a high level of integration of complex analogue and digital functions, with excellent flexibility in mixing technologies for the different functional blocks. This type of multichip integration provides a high degree of reliability and programmability at both the function and the system level, with the additional possibility of customising the microsystem to detector-specific requirements. For enhanced reliability in high radiation environments, fault tolerance strategies, i.e. redundancy, reconfigurability, majority voting and coding for error detection and correction, are integrated into the design.
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IJS, IMTLJ, KILJ, KISLJ, NUK, SBCE, SBJE, UL, UM, UPCLJ, UPUK
39.
The DIRC particle identification system for the B aB ar experiment Adam, I.; Aleksan, R.; Amerman, L. ...
Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment,
2005, Volume:
538, Issue:
1
Journal Article
Peer reviewed
A new type of ring-imaging Cherenkov detector is being used for hadronic particle identification in the B
aB
ar experiment at the SLAC B Factory (PEP-II). This detector is called DIRC, an acronym for ...Detection of Internally Reflected Cherenkov (Light). This paper will discuss the construction, operation and performance of the B
aB
ar DIRC in detail.
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IJS, IMTLJ, KILJ, KISLJ, NUK, SAZU, SBCE, SBJE, UL, UM, UPCLJ, UPUK
As the LHC luminosity is ramped up to 3×10 34 cm -2 s -1 and beyond, the high rates, multiplicities, and energies of particles seen by the detectors will pose a unique challenge. Only a tiny fraction ...of the produced collisions can be stored on tape and immense real-time data reduction is needed. An effective trigger system must maintain high trigger efficiencies for the physics we are most interested in, and at the same time suppress the enormous QCD backgrounds. This requires massive computing power to minimize the online execution time of complex algorithms. A multi-level trigger is an effective solution for an otherwise impossible problem. The Fast Tracker (FTK) is a proposed upgrade to the current ATLAS trigger system that will operate at full Level-1 output rates and provide high quality tracks reconstructed over the entire detector by the start of processing in Level-2. FTK solves the combinatorial challenge inherent to tracking by exploiting massive parallelism of associative memories that can compare inner detector hits to millions of pre-calculated patterns simultaneously. The tracking problem within matched patterns is further simplified by using pre-computed linearized fitting constants and leveraging fast DSPs in modern commercial FPGAs. Overall, FTK is able to compute the helix parameters for all tracks in an event and apply quality cuts in less than 100 μs. The system design is defined and studied with respect to high transverse momentum (high-P T ) Level-2 objects: b-jets, tau-jets, and isolated leptons. We test FTK algorithms using ATLAS full simulation with WH events up to 3×10 34 cm -2 s -1 luminosity and comparing FTK results with the offline tracking capability. We present the architecture and the reconstruction performances for the mentioned high-P T Level-2 objects.
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