Predicting temperature and power consumption in panels and modules under high brightness has long been a daunting and time‐intensive task, often requiring over a week of simulation work. Addressing ...this challenge, our study introduces a novel machine learning framework, bifurcated into panel and module stages, to streamline the data acquisition process. A key innovation in our approach is the use of symbolic regression to overcome the limitations posed by the reliance on real‐world measurements for power consumption and heat generation. Employing SPICE simulations, we estimated the current density within the panel, with subsequent validation through Explainable AI (XAI) analysis. This revealed a significant correlation between current density and panel heat generation. Our research also revisits the traditionally neglected areas outside the panel's center, uncovering their impact on heat generation. The layered complexity in modules, previously a barrier to physical sample creation and measurement, was navigated using simulation. XAI insights demonstrated the crucial roles of graphite and metal layers in heat dissipation, and the drive IC as a primary heat source. This integrated approach of real and computational data in machine learning significantly reduced the analysis timeframe from a week to mere minutes, marking a breakthrough in predictive accuracy and efficiency for high‐brightness scenarios.
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FZAB, GIS, IJS, KILJ, NLZOH, NUK, OILJ, SAZU, SBCE, SBMB, UL, UM, UPUK
Highly flammable polyurethane foam (PUF) remains a key risk factor associated with bedding and upholstered furniture, contributing to the yearly destruction of property and loss of lives. In an ...attempt to tackle this issue and develop a more benign flame retardant for PUF, a mica-based nanocomposite was deposited using layer-by-layer assembly. Chitosan (CH) and poly(acrylic acid) (PAA) were used to stabilize high-aspect-ratio mica. Foam treated with eight bilayers of CH- and PAA-stabilized mica preserves the porous foam structure, prevents melt dripping, and self-extinguishes during a 10 s torch test, while uncoated foam is completely consumed. When exposed to 35 kW/m2 heat flux during cone calorimetry, the peak heat release rate is reduced by 54% and less-volatile molecules are released during combustion, resulting in a 76% reduction in the total smoke release. This multilayer coating serves as an environmentally benign template for flame-retarding PUF and various other three-dimensional substrates.
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IJS, KILJ, NUK, PNG, UL, UM
“Gamma Tuning” is an important key technology in producing high‐quality display products. Recently, as high‐definition and high‐performance products are required, production time is also increasing ...proportionally as gamma tuning points increase. To overcome this problem, in this paper, we propose and validate an AI gamma tuning technique based on deep learning that tunes only minimal gamma points. As a result of the verification, gamma tuning points were reduced by 15.6% compared to traditional machine learning, and the image quality performance was equal to or higher than that of all actual gamma point tuning.
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FZAB, GIS, IJS, KILJ, NLZOH, NUK, OILJ, SAZU, SBCE, SBMB, UL, UM, UPUK
This article proposes practical design techniques to enhance performance and reliability of 1024 GB/s high-bandwidth memory-3 (HBM3). Effective data-bus design methods are applied to transfer data ...from multi-bank to a data-bus with a sufficient data fetch margin. A symbol-based on-die error-correcting code (OD-ECC) to correct a 16-bit error, bounded by a sub-wordline (WL), and parallelized data-bus inversion (DBI) are implemented. Error check and scrub (ECS) mode and repair capability check (RCC) mode with an internal serial interface are designed to support system reliability, availability, and serviceability (RAS). A memory built-in self-test (MBIST) provides a unified at-speed test with programmability based on test-set units (TUs). A 16 GB HBM3 fabricated in the third generation of the 10 nm class DRAM process achieves a bandwidth up to 1024 GB/s (8 Gb/s/pin) and provides stable operation at a high temperature (e.g., 105 °C) while improving an error detection rate by 92.2%.
It is a proposal for preventing image sticking of OLED using deep learning based object detection. It was able to detect transparent objects superimposed on complex backgrounds and we got 92% ...detection performance. The burn‐in pixels can be detected in real time and the luminance can be adjusted to 80%.
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FZAB, GIS, IJS, KILJ, NLZOH, NUK, OILJ, SAZU, SBCE, SBMB, UL, UM, UPUK
As data sizes increase exponentially, the demand for higher-density NAND with a smaller cell size and a higher interface speed has also increased 1-4. However, the increased number of WL-stack layers ...results in a smaller sensing circuit size and a smaller WL-to-WL spacing, which increases the intrinsic transistor variation and the inter-cell interference. One way to achieve good density while maintaining system performance is to support more multiple-plane operations with a circuit under cell array architecture, which leads to an increased noise power. Moreover, to achieve a 2.4Gb/s the I/O circuits need to support the faster speed while achieving lower power consumption. This paper presents the offset cancelling sensing latch (OCSL) scheme, the quad-group interference-free read (Q-IFR) scheme, and the common-source line (CSL) noise-tracking scheme to resolve the aforementioned challenges. In terms of the high-speed I/O bandwidth, a receiver circuit and an internal reference voltage generator are also proposed to increase the I/O speed, reduce the standby power consumption, and reduce the settling time when the chip is enabled.
Rapidly evolving artificial intelligence (Al) technology, such as deep learning, has been successfully deployed in various applications: such as image recognition, health care, and autonomous ...driving. Such rapid evolution and successful deployment of Al technology have been possible owing to the emergence of accelerators, such as GPUs and TPUs, that have a higher data throughput. This, in turn, requires an enhanced memory system with large capacity and high bandwidth 1; HBM has been the most preferred high-bandwidth memory technology due to its high-speed and low-power characteristics, and 1024 IOs facilitated by 2.5D silicon interposer technology, as well as large capacity realized by through-silicon via (TSV) stack technology 2. Previous-generation HBM2 supports 8GB capacity with a stack of 8 DRAM dies (i.e., 8-high stack) and 341GB/s (2.7Gb/s/pin) bandwidth 3. The HBM industry trend has been a speed improvement of 15~20% every year, while capacity increases by 1.5-2x every two years. In this paper, we present a 16GB HBM2E with circuit and design techniques to increase its bandwidth up to 640GB/s (5Gb/s/pin), while providing stable bit-cell operation in the 2 nd generation of a 10nm DRAM process: featuring (1) a data-bus window-extension technique to cope with reduced t_{cco} , (2) a power delivery network (PDN) designed for stable operation at a high speed, (3) a synergetic on-die ECC scheme to reliably provide large capacity, and (4) an MBIST solution to efficiently test large capacity memory at a high speed.
This paper presents the symbol-based On-die ECC (OD-ECC) configuration of High Bandwidth Memory-3 (HBM3) to correct a 16-bit error, bounded by a sub-wordline (WL), and implementation for parallelized ...data bus inversion (DBI). In addition, the die-to-die integration method for error check and scrub (ECS) mode, and programmable memory built-in self-test (MBIST) design approach for at-speed test are de-scribed. The fabricated HBM3 improves the error detection rate by 92.2% with 99.7% fault coverage of OD-ECC logic while achieving 8.0 Gb/s/pin.
Ubiquitous computing environment pursues context-aware in order words personalized service by collecting contexts through sensors located over wide area and presenting the service automatically ...depending not on the user's request but on the situations that are needed. But in order to provide the personalized service, contexts collected through various sensors are needed and they include private information. Therefore, it is important to keep a balance between the convenience by presenting service and protecting private information. In this paper, we classify and grade user's various contexts requested in ubiquitous computing environment. Based on these, we make decisions on whether to present the service or not by profile-matching between user profile and privacy requirements for providing service.
In general, the cryptographic operation in wireless devices which have low memory and low computing power causes the system overhead, so that it badly affects the performance of other tasks. ...Therefore, it is positively necessary to implement the security hardware which is dedicated to the cryptographic operation. Early researches about the security hardware architectures make design metrics with data throughput, gate usage, and power consumption to demonstrate the efficiency of their architectures. In this paper, we provide an efficient hardware architecture of the security processing for ZigBee, which satisfies the constraints IEEE 802.15.4 standard requires. These requirements mainly consist of the critical response time, the verification delay, and the throughput. In experiments, we implemented the security processing for ZigBee that used fewer logic gates and consumed low power than other earlier ZigBee chips and fulfilled the standard requirements with considerable margins.
