The process of adipocyte browning has recently emerged as a novel therapeutic target for combating obesity and obesity-related diseases. Non-shivering thermogenesis is the process of biological heat ...production in mammals and is primarily mediated via brown adipose tissue (BAT). The recruitment and activation of BAT can be induced through chemical drugs and nutrients, with subsequent beneficial health effects through the utilization of carbohydrates and fats to generate heat to maintain body temperature. However, since potent drugs may show adverse side effects, nutritional or natural substances could be safe and effective as potential adipocyte browning agents. This review aims to provide an extensive overview of the natural food compounds that have been shown to activate brown adipocytes in humans, animals, and in cultured cells. In addition, some key genetic and molecular targets and the mechanisms of action of these natural compounds reported to have therapeutic potential to combat obesity are discussed.
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IZUM, KILJ, NUK, PILJ, PNG, SAZU, UL, UM, UPUK
We present a 1.62-5.4-Gb/s receiver for DisplayPort version 1.2a and propose an adaptive equalizer (EQ) with a peak-level comparison technique for eye measurement. A single comparator and an up/down ...unmatched-current charge pump are used to realize a simpler EQ architecture with low power dissipation. A referenceless frequency acquisition technique is also proposed. A time-to-digital converter-based pulsewidth detector supports the referenceless frequency acquisition within the range of 1.62-5.4 Gb/s. An XOR-gate-embedded charge pump and a half-rate linear phase detector were used to improve the jitter tolerance (JTOL) performance. The measured eye opening of the proposed EQ at 5.4 Gb/s was 0.68 UI with a -20-dB loss channel. The proposed receiver passed all the JTOL tests of the DisplayPort compliance specification version 1.2b. The power consumption of the receiver was 36.8 mW at 5.4 Gb/s. The receiver occupied a core area of 0.265 mm 2 using 65-nm CMOS process technology.
This paper presents an area- and energy- efficient digital sub-sampling clock and data recovery (CDR) with combined adaptive equalizer and self-error corrector (SEC). Using the digitized phase ...difference between the incoming data and the full-rate output clock of a digitally controlled oscillator (DCO) for both the equalizer adaptation and clock recovery loop, the proposed adaptive equalizer is combined with the CDR by sharing its adaptation loop including a sub-sampling phase detector (SSPD) and a digital logic circuit. Consequently, the active area and power dissipation for the adaptive equalizer are reduced. Furthermore, the SEC is proposed to improve the high-frequency jitter tolerance of the CDR. The SEC detects bit errors by observing the comparator decision and corrects the errors without any data encoding or complicate circuits. The out-of-band jitter tolerance is improved by 22.6% at 100 MHz for 17.2-dB loss channel with <10 −12 bit-error rate (BER) with the proposed SEC. The SEC is applicable to various receivers with compact design at a low cost. The prototype receiver consumes 23.9 mW at 14-Gb/s and occupies 0.007 mm 2 in a 28-nm CMOS technology.
An add-on type real-time jitter tolerance enhancer (JTE) is presented in this paper. The proposed JTE can improve high-frequency jitter tolerance (JTOL) by using a real-time phase alignment scheme. A ...mathematical analysis for an advanced bit error rate (BER) prediction method is also introduced. The proposed circuit is applicable to various types of receivers, such as referenceless receivers, receivers with a reference clock source, and source-synchronous receivers. The referenceless receiver with the proposed JTE achieved an out-of-band JTOL of 0.71 UI pp at 100 MHz with <;10 -12 BER. This is 196% higher than a conventional receiver without the JTE. The source-synchronous receiver with the proposed JTE achieved 0.92 UIpp at 300 MHz with <;10 -12 BER. Total core areas of the receiver and JTE are 0.19 and 0.07 mm 2 in a 0.13-μm CMOS process, respectively. The power consumption of the receiver is 38 mW at 5.4 Gbit/s, and the JTE dissipates 22 mW.
This paper characterizes the precautionary demand for international reserves driven by the attempt to reduce the incidence of costly output decline induced by sudden reversal of short-term capital ...flows. It validates the main predictions of the precautionary approach by investigating changes in the patterns of international reserves in Korea in the aftermath of the 1997–1998 crisis. This crisis provides an interesting case study, especially because of the rapid rise in Korea's financial integration in the aftermath of the East Asian crisis, where foreigners' shareholding has increased to 40% of total Korean market capitalization. We show that the crisis led to structural change in the hoarding of international reserves, and that the Korean monetary authority gives much greater attention to a broader notion of ‘hot money,’ inclusive of short-term debt and foreigners' shareholding.
J. Japanese Int. Economies
21 (1) (2007) 1–15.
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GEOZS, IJS, IMTLJ, KILJ, KISLJ, NUK, OILJ, PNG, SAZU, SBCE, SBJE, UL, UM, UPCLJ, UPUK
An important issue in wireline receivers (RX) is minimizing the area and power consumption while overcoming the channel attenuation with an equalizer. The greater the compensation for channel loss at ...the analog front end (AFE) of the RX, the lower the number of decision feedback equalizer (DFE) taps. Power dissipation and area can be reduced by reducing the number of DFE taps. This brief presents a technology that compensates for the channel loss with the proposed AFE based on a two-stage continuous-time linear equalizer (CTLE), low and high bandwidth amplifiers, and a gain controller. It sufficiently reduces the DC gain and increases the peak gain of the AFE by using a feedforward equalizer (FFEQ) and feedback equalizer (FBEQ). These equalizers result in an increase in the difference between the peak and DC gains and the gain difference at the fundamental frequency (f 0 ) and 2nd subharmonic frequency (f 1/2 ). The IC is fabricated in a 28 nm CMOS process, and the proposed architecture yields a BER less than 10 −12 at 25.8 dB channel attenuation. At 25 Gb/s, the area and power efficiency of the proposed AFE are 1.19 pJ/bit and 0.01 mm 2 , respectively.
This brief presents a low-power counter-based adaptive equalizer that does not require additional power-hungry comparators for an equalizer adaptation loop. A pulse generator in the proposed ...equalizer obviates the need for additional error sampling comparators. Instead, it allows the receiver to utilize an output of a data decision comparator for the equalizer adaptation by generating a pulse that indicates whether the comparator makes a firm decision for the incoming data. A single comparator is shared by the data recovery path and equalizer adaptation loop. Consequently, the proposed counter-based equalizer achieves a low power dissipation owing to the reduced number of comparators. Fabricated in a 28-nm CMOS technology, the prototype receiver occupies an active area of 0.004 mm 2 and consumes only 0.99-pJ/b at 15-Gb/s.
This article introduces a 192-Gb 896-GB/s 12-high stacked third-generation high-bandwidth memory (HBM3 DRAM) with low power consumption and high-reliability traits. New design schemes and features, ...including internal low-voltage signaling, center strobe calibration, through-silicon via (TSV) auto-calibration, a symbol-correcting in-DRAM ECC, and machine-learning-based layout optimization, allow large amounts of data transfers among the vertically stacked base and core dies with limited delay mismatch or SI degradation, as well as reduced power consumption from low-voltage swings. Experimental results confirm 896-GB/s bandwidth operations at 1.0-V voltage conditions with up to 15% improved power efficiency.
Despite negative public opinion, the role of the Korean government has expanded, while overcoming two rounds of global financial crises. The phenomenon of the re-swelling state is mainly attributed ...to the strengthening of the central bureaucracy, in particular the financial bureaucracy, rather than the whole central government or the state. The argument of the strengthening of the 'state' or the 'government' after economic crises might be subject to the error of generalization. Through the two rounds of economic crises, the financial bureaucracy succeeded in acquiring the authority of market supervision and industrial support. In consequence, the bureaucracy's institutional supremacy within the government grew less challenged. The central bureaucracy was no longer the loyal servant to the President. It has reinforced its institutional strength and autonomy vis-a-vis the President, the National Assembly, the Central Bank and civil society, under the pretext of building up the rational and autonomous market and democratic politics.
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