This book is a collection of 13 innovative papers describing the state of the art and the future perspectives in solid-phase extraction covering several analytical fields prior to the use of gas or ...liquid chromatographic analysis. New sorptive materials are presented including carbon nanohorn suprastructures on paper support, melamine sponge functionalized with urea–formaldehyde co-oligomers, chiral metal–organic frameworks, UiO-66-based metal–organic frameworks, and fabric phase sorptive media for various applications. Solid-phase extraction can be applied in several formats aside from the conventional cartridges or mini-column approach, e.g., online solid-phase extraction, dispersive solid-phase microextraction, and in-syringe micro-solid-phase extraction can be very helpful for analyte pre-concentration and sample clean-up. Polycyclic musks in aqueous samples, 8-Nitroguanine in DNA by chemical derivatization antibacterial diterpenes from the roots of salvia prattii, perfluoroalkyl substances (PFASs) in aater samples by bamboo charcoal-based SPE, parabens in environmental water samples, benzotriazoles as environmental pollutants, organochlorine pesticide residues in various fruit juices and water samples and synthetic peptide purification are among the applications cited in this collection. All these outstanding contributions highlight the necessity of this analytical step, present the advantages and disadvantages of each method and focus on the green analytical chemistry guidelines that have to be fulfilled in current analytical practices.
Miniaturized solid-phase extraction techniques Płotka-Wasylka, Justyna; Szczepańska, Natalia; de la Guardia, Miguel ...
TrAC, Trends in analytical chemistry (Regular ed.),
November 2015, 2015-11-00, Volume:
73
Journal Article
Peer reviewed
•The milestones in development of the solid-phase extraction technique.•Miniaturized solid-phase extraction techniques.•Advantages and drawbacks of solid-phase-based extraction techniques.
More than ...80% of analysis time is spent on sample collection and sample preparation, so sample preparation is a critical part of the analytical process. Traditionally, liquid-liquid extraction was developed and employed to screen for general unknowns. However, solid-phase extraction (SPE) is becoming highly popular as an alternative, due to its simplicity and economy in terms of time and solvent. This review summarizes the current state of the art and the future prospects for green analytical chemistry with special emphasis on environment-friendly sample-preparation techniques based on the solid phase. We discuss in detail miniaturized SPE techniques, based on the most relevant, most representative and most recent scientific references.
Full text
Available for:
GEOZS, IJS, IMTLJ, KILJ, KISLJ, NUK, OILJ, PNG, SAZU, SBCE, SBJE, UL, UM, UPCLJ, UPUK
Data are limited in developing countries regarding the clinicopathologic features and response to therapy of chronic myeloid leukemia (CML) in the era of imatinib (IM). The objective of this study is ...to report on the clinicoepidemiologic features of CML in Tunisia, to evaluate the long-term outcome of patients in chronic (CP) or accelerated phase (AP) treated with IM 400 mg daily as frontline therapy, and to determine imatinib’s efficacy and safety. From October 2002 to December 2014, 410 CML patients were treated with IM in six Tunisian departments of hematology. Response (hematologic, cytogenetic, and molecular responses) and outcome—overall survival (OS), event-free survival (EFS), and progression-free survival (PFS)—were evaluated. The following prognostic factors were analyzed for their impact on the European leukemia net (ELN) response, OS, EFS, and PFS at 5 years: age, sex, leukocyte count, Sokal score, European Treatment and Outcome Study (EUTOS) score, CML phase, time to starting IM, and impact of adverse events. The median age was 45 years (3–85 years). Two hundred ten (51.2%) patients were male. Splenomegaly was present in 322 of the 410 (79%). Additional cytogenetic abnormalities were encountered in 25 (6.3%) patients. At diagnosis, 379 (92.4%) patients were in CP, 31 (7.6%) were in AP. The Sokal risk was low in 87 (22.5%), intermediate in 138 (35.7%), and high in 164 patients (41.9%). The EUTOS risk was low in 217 (74%), and high in 77 (26%) patients. The rates of cumulative complete cytogenetic response (CCyR), major molecular response (MMR), and molecular response 4/5 log (MR4.5) in CP/AP-CML patients were 72, 68.4, and 46.4%, respectively. The median time to reach CCyR, MMR, and MR4.5 was 6 months (3–51), 18 months (3–72), and 24 months (3–100), respectively. According to the ELN criteria, optimal, suboptimal response, and failure were noted in 206 (51.8%), 61 (15.3%), and 125 (31.4%) patients, respectively. Five-year event-free survival (EFS), progression-free survival (PFS), and overall survival (OS) were 81, 90, and 90%, respectively. By multivariate analysis, AP, high EUTOS risk, and baseline WBC ≥ 150G/l remained independent predictive factors of non-optimal response to IM. The adverse events (AE) of IM were moderate and tolerable. With the caveats that the monitoring of the disease was not optimal, response rates were similar to those reported in previous studies. It is clear to us that improvements should be made in treatment of AP-CML and high Sokal risk group of CP-CML. The frontline use of second-generation tyrosine kinase inhibitor (TKI) is expected to improve the results of the first-line treatment of these high-risk Tunisian patients, but cost and accessibility of this therapy remain the problems in developing countries.
Full text
Available for:
EMUNI, FIS, FZAB, GEOZS, GIS, IJS, IMTLJ, KILJ, KISLJ, MFDPS, NLZOH, NUK, OBVAL, OILJ, PNG, SAZU, SBCE, SBJE, SBMB, SBNM, UKNU, UL, UM, UPUK, VKSCE, ZAGLJ
A low-power 28-GHz phased-array receiver (RX) front end is presented that incorporates a low-power low-noise amplifier (LNA) and a passive reflection-type phase shifter (RTPS) capable of 360° phase ...shift with 5-b phase resolution and low gain variation. Passive phase shifters are limited by tradeoffs between phase resolution, insertion loss, and phase shift range. The proposed RTPS load design and optimization approach leads to a 28-GHz RTPS achieving the state-of-the-art insertion loss with 360° phase shift range and low loss variation across the phase shift. The LNA adopts a transformer-coupled neutralization architecture that increases available gain, enabling lower power consumption. The phased-array front end is designed for Ka-band applications and has been implemented in 65-nm CMOS. The measured RTPS achieves 360° phase shift with 7.75 ± 0.3 dB insertion loss and an rms phase error of 0.3° at 28 GHz. The low-power phased-array RX front end has an overall gain of 9.5 ± 0.4 dB and noise figure <;5.5 dB at 28 GHz. The RX front end consumes 10 mW from a 0.9-V supply with phase shifter and an LNA active area of 0.16 and 0.32 mm 2 , respectively, in 65-nm CMOS, demonstrating its suitability for low-power phased-array RX for emerging wireless links.
This paper proposes a technique for accurate phase estimation of distorted three-phase grid voltages including unbalanced amplitudes and/or phase angles. An adaptive cascaded delayed signal ...cancellation (CDSC) strategy is used for the generation of the amplitude balanced three-phase voltages. The CDSC strategy also eliminates both odd and even harmonics from the input voltage. An algorithm is also reported for removing the phase angle deviations from the three-phase voltages including unbalanced phase angles. Finally, a phase-locked loop (PLL) is applied to estimate the phase angle of the reference phase voltage. It requires only one PLL to estimate three phase angles of the thee-phase voltages, respectively, suffering from the unbalanced amplitudes and phase angles. It is also immune to harmonic distortions at changeable frequency environment. When compared to the CDSC-PLL and dq CDSC-PLL techniques reported in the technical literature, it can provide improved phase estimation under amplitude and phase unbalanced condition. Simulated and experimental results of the technique are acquired from the MATLAB/Simulink and dSPACE1104 control board platform, respectively, for a number of case studies observed in the grid voltage.
In recent decades, researchers have devoted tremendous effort into the rational design and controlled synthesis of metal nanomaterials with well‐defined size, morphology, composition, and structure, ...and great achievements have been reached. However, the crystal‐phase engineering of metal nanomaterials still remains a big challenge. Recent research has revealed that the crystal phase of metal nanomaterials can significantly alter their properties, arising from the distinct atomic arrangement and modified electronic structure. Until now, it has been relatively uncommon to synthesize metal nanomaterials with novel crystal phases in spite of the fact that these nanostructures would be promising for various applications. Here, the research progress regarding the fine control of noble metal (Au, Ag, Ru, Rh, Pd) and non‐noble metal (Fe, Co, Ni) nanomaterials with novel crystal phases is reviewed. First, synthesis strategies and their phase transformations are summarized, while highlighting the peculiar characteristics of each element. The phase‐dependent properties are then discussed by providing representative examples. Finally, the challenges and perspectives in this emerging field are proposed.
Crystal‐phase engineering is an emerging research field to discover new properties and applications of nanomaterials. The synthesis methods of noble metals (Au, Ag, Ru, Rh, Pd) and non‐noble metals (Fe, Co, Ni) with novel crystal phases are summarized, and their phase‐dependent optical, electrical, catalytic, and magnetic properties are discussed.
Full text
Available for:
BFBNIB, FZAB, GIS, IJS, KILJ, NLZOH, NUK, OILJ, SAZU, SBCE, SBMB, UL, UM, UPUK
Metallic‐phase selenide molybdenum (1T‐MoSe2) has become a rising star for sodium storage in comparison with its semiconductor phase (2H‐MoSe2) owing to the intrinsic metallic electronic conductivity ...and unimpeded Na+ diffusion structure. However, the thermodynamically unstable nature of 1T phase renders it an unprecedented challenge to realize its phase control and stabilization. Herein, a plasma‐assisted P‐doping‐triggered phase‐transition engineering is proposed to synthesize stabilized P‐doped 1T phase MoSe2 nanoflower composites (P‐1T‐MoSe2 NFs). Mechanism analysis reveals significantly decreased phase‐transition energy barriers of the plasma‐induced Se‐vacancy‐rich MoSe2 from 2H to 1T owing to its low crystallinity and reduced structure stability. The vacancy‐rich structure promotes highly concentrated P doping, which manipulates the electronic structure of the MoSe2 and urges its phase transition, acquiring a high transition efficiency of 91% accompanied with ultrahigh phase stability. As a result, the P‐1T‐MoSe2 NFs deliver an exceptional high reversible capacity of 510.8 mAh g−1 at 50 mA g−1 with no capacity fading over 1000 cycles at 5000 mA g−1 for sodium storage. The underlying mechanism of this phase‐transition engineering verified by profound analysis provides informative guide for designing advanced materials for next‐generation energy‐storage systems.
By adopting a novel plasma‐assisted doping‐triggered phase‐transition engineering, stabilized P‐doped metallic phase selenide molybdenum (MoSe2) nanoflower composites (P‐1T‐MoSe2 NFs) with expanded interlayer spacing, metallic electronic conductivity, facilitated Na+ adsorption, and reduced Na+ diffusion barrier are fabricated for high‐performance sodium storage. The underlying mechanism analysis provides informative guide for designing advanced materials for next‐generation energy‐storage systems.
Full text
Available for:
BFBNIB, FZAB, GIS, IJS, KILJ, NLZOH, NUK, OILJ, SAZU, SBCE, SBMB, UL, UM, UPUK
A 16-modulo fractional-N sub-sampling phase-locked loop (SSPLL) with a quadrature voltage-controlled oscillator (VCO) interpolating 16 output phases is presented in this paper. Automatic soft ...switching between the sub-sampling phase control loop and the frequency control loop is proposed to improve loop robustness against perturbations and interferences, achieving more stable loop dynamics for a larger range of phase errors compared with prior art SSPLL designs. A capacitive phase interpolation network is implemented for 16-phase clock generation starting from quadrature phases. The 16 phases are further utilized to achieve fractional-N operation with a sub-sampling phase detector. This passive phase interpolation at the VCO frequency introduces no extra noise or power and avoids in-band phase noise degradation for fractional-N mode. Implemented in a 130-nm CMOS technology, the SSPLL chip achieves a measured in-band phase noise of -120 dBc/Hz and a measured integrated jitter of 158 fs at 2.4 GHz, while consuming 21 mW with 16 output phases. The measured reference spur and fractional spur levels are -72 and -52 dBc, respectively.
Dividerless synthesizers such as sub-sampling phase-locked loops (PLLs) and injection-locked clock multipliers have demonstrated some of the lowest jitters for a given power consumption (jitter-power ...<inline-formula> <tex-math notation="LaTeX">{\text {FoM}}_{j} </tex-math></inline-formula> metric). However, they contain a tradeoff between the spur and noise performance, where techniques incorporated for spur reduction adversely affect jitter or power performance. A new dividerless Type-I sampling PLL, called the reference sampling PLL (RS-PLL), which estimates the voltage-controlled oscillator (VCO) phase error by sampling the reference sine wave with a VCO square wave is demonstrated. A clock-and-isolation buffer which accelerates the VCO sine wave to a square wave sampling clock and simultaneously isolates the VCO tank from spur mechanisms in the sampler is included in place of a traditional reference buffer. By combining sampling clock buffer and VCO isolation functionalities into a single block, the RS-PLL eliminates the noise penalty of two separate buffers. The power penalty due to sampling at VCO frequency is restricted by limiting the activity of the switching circuits to the region around the reference zero crossing where the phase error information exists. The prototype RS-PLL implemented in 65-nm CMOS achieves a jitter-power <inline-formula> <tex-math notation="LaTeX">{\text {FoM}}_{j} </tex-math></inline-formula> of <−251 dB between 2.05 and 2.55 GHz with a reference spur of <−66 dBc at 50 MHz. In doing so, it improves upon the simultaneous noise and spur performance achieved by current state-of-the-art clock multipliers.
This paper presents a type-II reference-sampling (RS) phase-locked loop (PLL) exploiting a novel gain-boosting reference-sampling phase detector (RSPD) to reduce the in-band phase noise and RMS ...jitter. The proposed gain-boosting RSPD converts the phase error to the voltage error and utilizes a passive switched-capacitor voltage multiplier to amplify the sampled voltage error, which effectively increases the gain of the RSPD. The boosted RSPD gain helps suppress the phase noise contributed from the gm cell. To prevent the transistors in the gain-boosting RSPD and gm cell from breakdown, the gain-boosting function is only activated during the locked state when the phase and voltage errors are small. The switching between the gain-boosting and normal modes is realized automatically by monitoring the sampled voltage and comparing it with a pre-defined threshold window. Fabricated in 65-nm CMOS, the type-II RS-PLL measures an RMS jitter of 54 fs at 6.75 GHz and consumes 7.1 mW, corresponding to a jitter figure-of-merit (FoMjitter) of −256.8 dB. The measured reference spur is −62.6 dBc, and the active area is 0.25 mm2.