This paper presents a circuit implemen-tation of White Rabbit (WR) protocol over 1000BASE-T technology. It synchronizes the clocks of the master and slave devices with the accuracy less than 100 ps (peak-to-peak clock skew). The proposed implementation provides a cost-effective solution for distributed and synchronized applications in the future since it works on gigabit Ethernet using copper media without any extra hardware resources. To achieve the high accuracy, a clock synthesis circuit using a mixed-mode clock manager (MMCM) inside a commercial FPGA and a frequency transfer strategy based on Synchronous Ethernet (SyncE) have been implemented. Measurement results show that the WR slave maintains the shared timing with the clock skew between -50.27 ps and 47.83 ps for 12 days over a simple test network. KCI Citation Count: 0