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Jin, Dong-Hwan; Kwon, Ji-Wook; Seo, Min-Jae; Kim, Mi-Young; Shin, Min-Chul; Kang, Seok-Joon; Yoon, Jung-Hyuk; Kim, Taek-Seung; Ryu, Seung-Tak
IEEE journal of solid-state circuits, 06/2019, Volume: 54, Issue: 6Journal Article
This paper presents a reference-free readout method for the phase-change memory (PCM) that compensates for the temperature drift of the cell resistance. The proposed method reconfigures the sense amplifier (SA) array into flash analog-to-digital converters (ADCs) in order to extract the optimum decision threshold for the given temperature from the distribution of the data output therefrom. The resolution of the reconfigured flash ADC, the number of flash ADCs for data averaging, and the required number of samples are determined for a target bit error rate of 1 ppm. The proposed SA drives a bit line (BL) rapidly with switchable current sources. A proof-of-concept prototype chip is fabricated via the 180-nm CMOS process. A single-channel readout path occupies <inline-formula> <tex-math notation="LaTeX">137 \times 27\,\,\mu \text{m}^{\mathbf {2}} </tex-math></inline-formula> and consumes <inline-formula> <tex-math notation="LaTeX">305~\mu \text{W} </tex-math></inline-formula> under a 3.3-V supply, with readout latency less than 100 ns.
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