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  • A 2-Transistor-2-Capacitor ...
    Ma, Xiaoyang; Deng, Shan; Wu, Juejian; Zhao, Zijian; Lehninger, David; Ali, Tarek; Seidel, Konrad; De, Sourav; He, Xiyu; Chen, Yiming; Yang, Huazhong; Narayanan, Vijaykrishnan; Datta, Suman; Kampfe, Thomas; Luo, Qing; Ni, Kai; Li, Xueqing

    IEEE electron device letters, 07/2023, Volume: 44, Issue: 7
    Journal Article

    This paper proposes C 2 FeRAM, a 2T2C/cell ferroelectric compute-in-memory (CiM) scheme for energy-efficient and high-reliability edge inference and transfer learning. With certain area overhead, C 2 FeRAM achieves the following highlights: (i) compared with FeFET/FeMFET, it achieves disturb-free CiM and much higher write endurance (equal to FeRAM), leading to >100x inference time with <1% accuracy drop for VGG8 in CIFAR-10 dataset, along with the enhanced endurance for weight updates, e.g., CiM-based transfer learning; (ii) compared with 1T1C FeRAM inference cache, the achieved disturb-free feature and CiM capability in C 2 FeRAM lead to improvements of 4x energy, 200x speed, and 3.2e5x life cycles. Such benefits highlight an intriguing solution for future intelligent edge AI.