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Djoric-Veljkovic, Snezana; Manic, Ivica; Davidovic, Vojkan; Dankovic, Danijel; Golubovic, Snezana; Stojadinovic, Ninoslav
Nuclear Technology & Radiation Protection, 04/2011, Volume: 26, Issue: 1Journal Article
The annealing of radiation-induced defects in burn-in stressed n-channel power VDMOSFETs with thick gate oxides (100 and 120 nm) is analysed. In comparison with the previous spontaneous recovery, the changes of device electrical parameters observed during annealing are highlighted by the elevated temperature and voltage applied to the gate, and are more pronounced in devices with a 120 nm thick gate oxide. The threshold voltage of VDMOSFETs with a 100 nm thick gate oxide during annealing has an initially slow growth, but then increases rapidly and reaches the value higher than the pre-irradiation one (rebound effect). In the case of devices with a 120 nm thick gate oxide, the threshold voltage behaviour also consists of a slight initial increase followed by a rapid, but dilatory increase, with an obvious tendency to achieve the rebound. The changes of channel carrier mobility during annealing are similar in all samples: at first, it slowly and then rapidly declines, and after reaching the minimum it begins to increase. In the case of VDMOSFETs with a thicker gate oxide, these changes are much slower. The underlying changes in the densities of gate oxide-trapped charge and interface traps are also delayed in devices with a thicker gate oxide. All these phenomena occur with certain delay in burn-in stressed devices compared to unstressed ones. The leading role in the mechanisms responsible for the observed phenomena is attributed to hydrogen related species. U ovom radu analizirano je odzarivanje radijacionih defekata kod VDMOS tranzistora snage sa ultradebelim oksidom gejta (100 nm i 120 nm), koji su bili podvrgnuti temperaturno-naponskim testovima zarenja. U poredjenju sa fazom spontanog oporavka prethodno ozracenih tranzistora, pokazano je da su promene njihovih elektricnih parametara (napon praga i pokretljivosti nosilaca) tokom odzarivanja prouzrokovane dejstvom povisene temperature i napona na gejtu. Tokom odzarivanja VDMOS tranzistora snage sa oksidom gejta debljine 100 nm, posle pocetnog laganog porasta, napon praga naglo pocinje da raste dostizuci vrednost vecu od one pre ozracivanja. Kod tranzistora sa oksidom gejta debljine 120 nm, napon praga takodje najpre lagano, a zatim naglo (ali sa kasnjenjem) raste, sa ociglednom tendencijom da se ispolji pomenuti skok napona praga. Promene pokretljivosti nosilaca tokom odzarivanja su slicne kod obe grupe tranzistora: pokretljivost najpre lagano, a zatim ostro opada, dostize minimum, a zatim pocinje da raste. U slucaju tranzistora sa debljim oksidom gejta ove promene su znatno sporije. Odgovarajuce promene gustina naelektrisanja u oksidu i povrsinskih stanja analizirane su sa aspekta odgovornih mehanizama. Pokazano je da, kod tranzistora sa debljim oksidom gejta, i promene gustina naelektrisanja u oksidu i povrsinskih stanja takodje kasne. Svi pomenuti fenomeni tokom odzarivanja najpre su zapazeni kod kontrolnih uzoraka, a zatim kod uzoraka koji su pre ozracivanja izlozeni temperaturno-naponskim testovima zarenja. Kljucna uloga u pomenutim mehanizmima pripisana je vodonikovim cesticama. PR Projekat Ministarstva nauke Republike Srbije
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