In this paper, a new multi loop sigma-delta ( capital sigma Delta ) modulator is proposed which employs one order redundant noise shaping in the first stage so the effect of the quantization noise leakage is minimized. Thus, analog circuit requirements are considerably relaxed compared to the conventional Multi-stAge-noise-SHaping (MASH) structures. This enhancement makes the structure appropriate for low voltage and broadband applications. The proposed architecture is compared with traditional high-order structures, and the advantages are demonstrated by both the analysis and behavioral system level simulations. As a prototype, the proposed MASH 3-2 sigma-delta modulator is designed, and the detailed design procedure is presented from the system level to the circuit level in a 90nm CMOS technology. Circuit level simulation results show that the modulator achieves a peak signal-to-noise and distortion ratio of 79.4dB and 79dB dynamic range over a 10MHz bandwidth with a sampling frequency of 160MHz. It consumes 35.4mW power from a single 1V supply. Copyright copy 2012 John Wiley & Sons, Ltd. A new Multi-stAge-noise-Shaping sigma delta modulator is proposed which employs one order redundant noise shaping in the first stage so the effect of the quantization noise leakage is reduced. As a prototype, A MASH 3-2 sigma-delta modulator is designed in a 90nm CMOS technology. The modulator achieves a peak SNDR of 79.4dB over a 10MHz bandwidth with a sampling frequency of 160MHz and consumes 35.4mW power from a single 1V supply.