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zadetkov: 12
1.
  • Application of flexible fla... Application of flexible flat panel display technology to wearable biomedical devices
    Smith, J; Bawolek, E; Lee, Y.K ... Electronics letters, 08/2015, Letnik: 51, Številka: 17
    Journal Article
    Recenzirano
    Odprti dostop

    How the application of commercial (thin film) flat panel display technology, used in the production of flexible displays and flexible digital X-ray detectors, can also be applied to reduce the ...
Celotno besedilo
Dostopno za: FZAB, GIS, IJS, KILJ, NLZOH, NUK, OILJ, SAZU, SBCE, SBMB, UL, UM, UPUK
2.
  • Localization of Gate Bias I... Localization of Gate Bias Induced Threshold Voltage Degradation in a-Si:H TFTs
    Shringarpure, R.; Venugopal, S.; Clark, L.T. ... IEEE electron device letters, 2008-Jan., 2008, 2008-1-00, 20080101, Letnik: 29, Številka: 1
    Journal Article
    Recenzirano

    This letter describes a method to identify the channel region of hydrogenated amorphous silicon thin film transistors (a-Si:H TFTs) in which threshold voltage(V th ) degradation occurs. The TFTs are ...
Celotno besedilo
Dostopno za: IJS, NUK, UL
3.
  • Control of Threshold Voltag... Control of Threshold Voltage and Saturation Mobility Using Dual-Active-Layer Device Based on Amorphous Mixed Metal-Oxide-Semiconductor on Flexible Plastic Substrates
    Marrs, M. A.; Moyer, C. D.; Bawolek, E. J. ... IEEE transactions on electron devices, 10/2011, Letnik: 58, Številka: 10
    Journal Article
    Recenzirano

    Amorphous oxide semiconductor thin-film transistors on flexible plastic substrates typically suffer from performance and stability issues related to the maximum processing temperature limitation of ...
Celotno besedilo
Dostopno za: IJS, NUK, UL
4.
  • Circuit-Level Impact of a-S... Circuit-Level Impact of a-Si:H Thin-Film-Transistor Degradation Effects
    Allee, D.R.; Clark, L.T.; Vogt, B.D. ... IEEE transactions on electron devices, 06/2009, Letnik: 56, Številka: 6
    Journal Article
    Recenzirano

    This paper reviews amorphous silicon thin-film-transistor (TFT) degradation with electrical stress, examining the implications for various types of circuitry. Experimental measurements on ...
Celotno besedilo
Dostopno za: IJS, NUK, UL
5.
  • Stability of IZO and a-Si:H... Stability of IZO and a-Si:H TFTs Processed at Low Temperature (200 ^} )
    Kaftanoglu, K; Venugopal, S M; Marrs, M ... Journal of display technology, 06/2011, Letnik: 7, Številka: 6
    Journal Article

    Mixed-oxide thin-film transistors (TFTs) have been extensively researched due to their improved stability under electrical bias stress compared to amorphous-silicon TFTs. However, there are many ...
Celotno besedilo
Dostopno za: IJS, NUK, UL
6.
  • Future flexible OLED displays for army applications
    Forsythe, E.W.; Shi, J.; Liu, S. ... 2009 Conference on Lasers and Electro-Optics and 2009 Conference on Quantum electronics and Laser Science Conference
    Conference Proceeding

    Organic light emitting diodes have been fabricated on an active matrix backplane from an 180C processed amorphous Si thin film transistors on polyethylene naphthalate (PEN) substrates. Organic light ...
Celotno besedilo
Dostopno za: IJS, NUK, UL
7.
Celotno besedilo
Dostopno za: IJS, NUK, UL
8.
  • Circuit Simulation of Thres... Circuit Simulation of Threshold-Voltage Degradation in a-Si:H TFTs Fabricated at 175 @@u'@C
    Shringarpure, R; Venugopal, S; Li, Zi ... IEEE transactions on electron devices, 07/2007, Letnik: 54, Številka: 7
    Journal Article
    Recenzirano

    This brief presents a novel approach to modeling gate bias-induced threshold-voltage (V@@dth@) degradation in hydrogenated amorphous silicon thin-film transistors (TFTs). The V@@dth@ degradation ...
Celotno besedilo
Dostopno za: IJS, NUK, UL
9.
  • Circuit Simulation of Thres... Circuit Simulation of Threshold-Voltage Degradation in a-Si:H TFTs Fabricated at 175 ^\hbox
    Shringarpure, R.; Venugopal, S.; Zi Li ... IEEE transactions on electron devices, 2007-July, 2007-07-00, Letnik: 54, Številka: 7
    Journal Article
    Recenzirano

    This brief presents a novel approach to modeling gate bias-induced threshold-voltage (V th ) degradation in hydrogenated amorphous silicon thin-film transistors (TFTs). The V th degradation model is ...
Celotno besedilo
Dostopno za: IJS, NUK, UL
10.
  • Circuit Simulation of Thres... Circuit Simulation of Threshold-Voltage Degradation in a-Si:H TFTs Fabricated at 175 super(ADG)C
    Shringarpure, R; Venugopal, S; Li, Zi ... IEEE transactions on electron devices, 01/2007, Letnik: 54, Številka: 7
    Journal Article
    Recenzirano

    This brief presents a novel approach to modeling gate bias-induced threshold-voltage (V sub(th)) degradation in hydrogenated amorphous silicon thin-film transistors (TFTs). The V sub(th) degradation ...
Celotno besedilo
Dostopno za: IJS, NUK, UL
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zadetkov: 12

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