The CMS High-Granularity Calorimeter (HGCAL) imposes extremely challenging specifications for the front-end electronics: high dynamic range, low noise, high-precision time information and low power ...consumption, as well as the need to select and transmit trigger information with a high transverse and longitudinal granularity. HGCROC2 is the second prototype of the readout chip embedding almost all the final functionalities. It has 72 channels of the full analog chain: low noise and high gain preamplifier and shapers, a 10-bit 40 MHz SAR-ADC which provides the charge measurement over the linear range of the preamplifier, after the preamplifier saturation a discriminator and TDC provide the charge information from ToT (200 ns dynamic range and 50 ps binning), and a fast discriminator and TDC provide timing information to 25 ps accuracy. This paper reports on the performance in terms of noise, charge and timing, the DAQ and Trigger paths, as well as results from radiation qualification with total ionizing dose (TID) and heavy ions for single-event effects (SEE).
Abstract
This paper presents the design and characterisation of a front-end prototype ASIC for the ATLAS High Granularity Timing Detector, which is planned for the High-Luminosity phase of the LHC.
...This prototype, called ALTIROC1, consists of a 5 × 5-pad matrix and contains the analog
part of the single-channel readout (preamplifier, discriminator, two TDCs and SRAM).
Two preamplifier architectures (transimpedance and voltage) were implemented and tested.
The ASIC was characterised both alone and as a module when connected to a 5 × 5-pad array of LGAD sensors.
In calibration measurements, the ASIC operating alone was found to satisfy the technical requirements for the project, with similar performances for both preamplifier types. In particular, the jitter was found to be 15 ± 1 ps (35 ± 1 ps) for an injected charge of 10 fC (4 fC).
A degradation in performance was observed when the ASIC was connected to the LGAD array. This is attributed to digital couplings at the entrance of the preamplifiers.
When the ASIC is connected to the LGAD array, the lowest detectable charge increased from 1.5 fC to 3.4 fC. As a consequence, the jitter increased for an injected charge of 4 fC. Despite this increase, ALTIROC1 still satisfies the maximum jitter specification (below 65 ps) for the HGTD project.
This coupling issue also affects the time over threshold measurements and the time-walk correction can only be performed with transimpedance preamplifiers.
Beam test measurements with a pion beam at CERN were also undertaken to evaluate the performance of the module. The best time resolution obtained using only ALTIROC TDC data was 46.3 ± 0.7 ps for a restricted time of arrival range where the coupling issue is minimized.
The residual time-walk contribution is equal to 23 ps and is the dominant electronic noise contribution to the time resolution at 15 fC.
For the High-Luminosity phase of LHC, the ATLAS experiment is proposing the addition of a High Granularity Timing Detector (HGTD) in the forward region, to mitigate the effects of the increased ...pile-up. The chosen detection technology is Low Gain Avalanche Detector (LGAD) silicon sensors that can provide an excellent timing resolution below 50 ps. The front-end read-out ASIC must exploit the large signal derivative and small noise provided by the sensor, while keeping low power consumption. This paper presents the results on the first prototype of a front-end ASIC, named ALTIROC0, which contains the analog stages (preamplifier and discriminator) of the read-out chip. The ASIC was characterised both alone and as part of a module with a 2×2 LGAD array of 1.1×1.1 mm2 pads bump-bonded to it. The various contributions of the electronics to the time resolution were investigated in test-bench measurements with a calibration setup. Both when the ASIC is alone or with a bump-bonded sensor, the jitter of the ASIC is better than 20 ps for an injected charge of 10 fC . The time walk effect, which arises from the different preamplifier response for various injected charges, can be corrected up to 10 ps using a Time Over Threshold measurement. The combined performance of the ASIC and the LGAD sensor, which was measured during a beam test campaign in October 2018 with pions of 120 GeV energy at the CERN SPS, is around 40 ps for all measured modules. All tested modules show good efficiency and time resolution uniformity.
Abstract
The HKROC ASIC was originally designed to readout the photomultiplier tubes (PMTs) for the Hyper-Kamiokande (HK) experiment. HKROC is a very innovative ASIC capable of readout a large number ...of channels satisfying stringent requirements in terms of noise, speed and dynamic range. Each HKROC channel features a low-noise preamplifier and shapers, a 10-bit successive approximation Analog-to-Digital Converter (SAR-ADC) (designed by AGH Krakow) for the charge measurement (up to 2500 pC) and a Time-to-Digital Converter (TDC) (designed by CEA IRFU group) for the Time-of-Arrival (ToA) measurement with 25 ps binning. HKROC is auto-triggered and includes all necessary ancillary services as bandgap circuit, PLL (Phase-locked loop) and threshold DACs (Digital to Analog Converters). This paper will describe the ASIC architecture and the experimental results of the first HKROC prototype received in January 2022.
JEM-EUSO is an international program for the development of space-based Ultra-High Energy Cosmic Ray observatories. The program consists of a series of missions which are either under development or ...in the data analysis phase. All instruments are based on a wide-field-of-view telescope, which operates in the near-UV range, designed to detect the fluorescence light emitted by extensive air showers in the atmosphere. We describe the simulation software ESAF in the framework of the JEM-EUSO program and explain the physical assumptions used. We present here the implementation of the JEM-EUSO, POEMMA, K-EUSO, TUS, Mini-EUSO, EUSO-SPB1 and EUSO-TA configurations in ESAF. For the first time ESAF simulation outputs are compared with experimental data.
Celotno besedilo
Dostopno za:
DOBA, IZUM, KILJ, NUK, PILJ, PNG, SAZU, SIK, UILJ, UKNU, UL, UM, UPUK
6.
EUSO-SPB1 mission and science Abdellaoui, G.; Adams, J.H.; Alonso, G. ...
Astroparticle physics,
January 2024, 2024-01-00, 2024, Letnik:
154
Journal Article
Recenzirano
Odprti dostop
The Extreme Universe Space Observatory on a Super Pressure Balloon 1 (EUSO-SPB1) was launched in 2017 April from Wanaka, New Zealand. The plan of this mission of opportunity on a NASA super pressure ...balloon test flight was to circle the southern hemisphere. The primary scientific goal was to make the first observations of ultra-high-energy cosmic-ray extensive air showers (EASs) by looking down on the atmosphere with an ultraviolet (UV) fluorescence telescope from suborbital altitude (33 km). After 12 days and 4 h aloft, the flight was terminated prematurely in the Pacific Ocean. Before the flight, the instrument was tested extensively in the West Desert of Utah, USA, with UV point sources and lasers. The test results indicated that the instrument had sensitivity to EASs of ⪆3 EeV. Simulations of the telescope system, telescope on time, and realized flight trajectory predicted an observation of about 1 event assuming clear sky conditions. The effects of high clouds were estimated to reduce this value by approximately a factor of 2. A manual search and a machine-learning-based search did not find any EAS signals in these data. Here we review the EUSO-SPB1 instrument and flight and the EAS search.
Abstract
The complexity of modern cosmic ray observatories and the
rich data sets they capture often require a sophisticated software
framework to support the simulation of physical processes, ...detector
response, as well as reconstruction and analysis of real and
simulated data. Here we present the EUSO-Offline framework. The
code base was originally developed by the Pierre Auger
Collaboration, and portions of it have been adopted by other
collaborations to suit their needs. We have extended this software
to fulfill the requirements of Ultra-High Energy Cosmic Ray
detectors and very high energy neutrino detectors developed for the
Joint Exploratory Missions for an Extreme Universe Observatory
(JEM-EUSO). These path-finder instruments constitute a program to
chart the path to a future space-based mission like POEMMA. For
completeness, we describe the overall structure of the framework
developed by the Auger collaboration and continue with a description
of the JEM-EUSO simulation and reconstruction capabilities. The
framework is written predominantly in modern C++ (compliled against
C++17) and incorporates third-party libraries chosen based on
functionality and our best judgment regarding support and
longevity. Modularity is a central notion in the framework design, a
requirement for large collaborations in which many individuals
contribute to a common code base and often want to compare different
approaches to a given problem. For the same reason, the framework is
designed to be highly configurable, which allows us to contend with
a variety of JEM-EUSO missions and observation scenarios. We also
discuss how we incorporate broad, industry-standard testing coverage
which is necessary to ensure quality and maintainability of a
relatively large code base, and the tools we employ to support a
multitude of computing platforms and enable fast, reliable
installation of external packages. Finally, we provide a few
examples of simulation and reconstruction applications using
EUSO-Offline.
This paper presents the design and characterisation of a front-end prototype ASIC for the ATLAS High Granularity Timing Detector, which is planned for the High-Luminosity phase of the LHC. This ...prototype, called ALTIROC1, consists of a 5\(\times\)5-pad matrix and contains the analog part of the single-channel readout (preamplifier, discriminator, two TDCs and SRAM). Two preamplifier architectures (transimpedance and voltage) were implemented and tested. The ASIC was characterised both alone and as a module when connected to a 5\(\times\)5-pad array of LGAD sensors. In calibration measurements, the ASIC operating alone was found to satisfy the technical requirements for the project, with similar performances for both preamplifier types. In particular, the jitter was found to be 15\(\pm\)1~ps (35\(\pm\)1~ps) for an injected charge of 10~fC (4~fC). A degradation in performance was observed when the ASIC was connected to the LGAD array. This is attributed to digital couplings at the entrance of the preamplifiers. When the ASIC is connected to the LGAD array, the lowest detectable charge increased from 1.5~fC to 3.4~fC. As a consequence, the jitter increased for an injected charge of 4~fC. Despite this increase, ALTIROC1 still satisfies the maximum jitter specification (below 65~ps) for the HGTD project. This coupling issue also affects the time over threshold measurements and the time-walk correction can only be performed with transimpedance preamplifiers. Beam test measurements with a pion beam at CERN were also undertaken to evaluate the performance of the module. The best time resolution obtained using only ALTIROC TDC data was 46.3\(\pm\)0.7~ps for a restricted time of arrival range where the coupling issue is minimized. The residual time-walk contribution is equal to 23~ps and is the dominant electronic noise contribution to the time resolution at 15~fC.
This is a collection of papers presented by the JEM-EUSO Collaboration at the 38th International Cosmic Ray Conference (Nagoya, Japan, July 26-August 3, 2023)
1 Abstract-Designed and characterized by the HGTD collaboration, ALTIROC belongs to the family of readout ASICs used at the Large Hadron Collider (LHC) for the High Luminosity-LHC upgrade. ALTIROC1 ...is a 25-channel ASIC designed in CMOS 130 nm to read out the 5 x 5 matrix of 1.3 mm x 1.3 mm Low Gain Avalanche Diodes (LGAD) of the ATLAS HGTD detector. The targeted combined time resolution of the sensor and its readout electronics from 35 ps/hit (initial) to 70 ps/hit (end of operational lifetime). Each ASIC channel integrates an RF preamplifier followed by a high speed discriminator and two TDCs for Time-of-Arrival and Time-Over-Threshold measurements as well as a local memory. This front-end must exhibit an extremely low jitter noise while keeping a challenging power consumption of less than 4.5 mW per channel. This conference proceeding summarizes the ASIC's architecture, its measured performances compared to simulation, along with the requirements for the HEP experiments.
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