Molybdenum disulfide (MoS2) is a layered semiconducting material with a tunable bandgap that is promising for the next generation nanoelectronics as a substitute for graphene or silicon. Despite ...recent progress, the synthesis of high‐quality and highly uniform MoS2 on a large scale is still a challenge. In this work, a temperature‐dependent synthesis study of large‐area MoS2 by direct sulfurization of evaporated Mo thin films on SiO2 is presented. A variety of physical characterization techniques is employed to investigate the structural quality of the material. The film quality is shown to be similar to geological MoS2, if synthesized at sufficiently high temperatures (1050 °C). In addition, a highly uniform growth of trilayer MoS2 with an unprecedented uniformity of ±0.07 nm over a large area (> 10 cm2) is achieved. These films are used to fabricate field‐effect transistors following a straightforward wafer‐scale UV lithography process. The intrinsic field‐effect mobility is estimated to be about 6.5±2.2 cm2 V–1 s–1 and compared to previous studies. These results represent a significant step towards application of MoS2 in nanoelectronics and sensing.
A temperature‐dependent synthesis study of large‐area MoS2 by direct sulfurization of evaporated Mo thin films is presented. The resulting film quality is similar to geological MoS2. An unprecedented uniformity of ±0.07 nm over a large area (>10 cm2) is achieved with trilayer MoS2. The estimated intrinsic field‐effect mobility is approximately 6.5 ± 2.2 cm2 V–1 s–1.
Atomically thin molybdenum disulfide (MoS2) is a promising two-dimensional semiconductor for high-performance flexible electronics, sensors, transducers, and energy conversion. Here, piezoresistive ...strain sensing with flexible MoS2 field-effect transistors (FETs) made from highly uniform large-area films is demonstrated. The origin of the piezoresistivity in MoS2 is the strain-induced band gap change, which is confirmed by optical reflection spectroscopy. In addition, the sensitivity to strain can be tuned by more than 1 order of magnitude by adjusting the Fermi level via gate biasing.
In the present study, we report for the first time synthesis of TiO2 nanotubes/CNTs heterojunction membrane. Chemical vapor deposition (CVD) of CNTs at 650 °C in a mixture of H2/He atmosphere led to ...in situ detachment of the anodically fabricated TiO2 nanotube layers from the Ti substrate underneath. Morphological and structural evolution of TiO2 nanotubes after CNTs deposition were investigated by field- emission scanning electron microscopy (FESEM), glancing angle X-ray diffraction (GAXRD), and X-ray photoelectron spectroscopy (XPS) analyses.
In this paper, the fabrication and growth mechanism of net-shaped micropatterned self-organized thin-film TiO2 nanotube (TFTN) arrays on a silicon substrate are reported. Electrochemical anodization ...is used to grow the nanotubes from thin-film titanium sputtered on a silicon substrate with an average diameter of ∼30 nm and a length of ∼1.5 μm using aqueous and organic-based types of electrolytes. The fabrication and growth mechanism of TFTN arrays from micropatterned three-dimensional isolated islands of sputtered titanium on a silicon substrate is demonstrated for the first time using focused-ion-beam (FIB) technique. This work demonstrates the use of the FIB technique as a simple, high-resolution, and maskless method for high-aspect-ratio etching for the creation of isolated islands and shows great promise toward the use of the proposed approach for the development of metal oxide nanostructured devices and their integration with micro- and nanosystems within silicon-based integrated-circuit devices.
Graphene as a conducting electrode has attracted significant attention due to its low sheet resistance, high flexibility and high transparency 1. Recently, high out-of-plane resistance of graphene ...has been utilized to reduce the operating current in metal oxide based resistive memories (RRAMs) 2. However, this report also indicates that the high out-of-plane resistance of graphene contributes to the requirement of high-voltage forming (6 V) 2. Since the forming step requires significantly higher voltage compared to regular set/reset operations, elimination of the forming step while maintaining the low-current operability is important for graphene RRAMs.In this work we demonstrate forming-free resistive switching in graphene-insulator-graphene (G-I-G) structures with graphene used as both top and bottom electrodes.
Multi-walled carbon nanotube (MWCNT)/nanostructured zirconia composites with a homogenous distribution of different MWCNT quantities (ranging within 0.5–5
wt.%) were developed. By using Spark Plasma ...Sintering we succeeded in preserving the MWCNTs firmly attached to zirconia grains and in obtaining fully dense materials. Moreover, MWCNTs reduce grain growth and keep a nanosize structure. A significant improvement in room temperature fracture toughness and shear modulus as well as an enhanced creep performance at high temperature is reported for the first time in this type of materials. To support these interesting mechanical properties, high-resolution electron microscopy and mechanical loss measurements have been carried out. Toughening and creep hindering mechanisms are proposed. Moreover, an enhancement of the electrical conductivity up to 10 orders of magnitude is obtained with respect to the pure ceramics.
