Characterization of near-interface traps (NITs) in commercial SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) is essential because they adversely impact both performance and ...reliability by reducing the channel carrier mobility and causing threshold-voltage drift. In this work, we have applied a newly developed integrated-charge technique to measure the density of NITs that are active in the above-threshold region of commercial SiC MOSFETs. The results demonstrate that NITs trap about 10% of the channel electrons for longer than 500 ns.
We investigate the impact of power MOSFET channel width on the power efficiency of a switch-mode power supply. With this analysis, we derive a circuit-specific criterion that minimizes the power ...dissipated by a power MOSFET, which is based on the ratio between on resistance and output capacitance of the MOSFET and is independent of its technological parameters. The effect of channel width on the power dissipation is illustrated by simulation-based analysis, which also provide an example of a published non-optimum selection of a power MOSFET and demonstrate the advantage of the newly proposed method for MOSFET selection.
Oxide traps existing in 4H-SiC MOS capacitors with fast response times that are active in the strong accumulation and depletion regions were characterized by an integrated-charge method. The method ...is based on the measurement of charging and discharging voltages across MOS capacitors in response to high-frequency voltage pulses. This method can identify traps with response times in the order of hundreds of nanoseconds. The results reveal an increasing density of near-interface traps with energy levels above the bottom of the conduction band, which are the active defects reducing the channel-carrier mobility in 4H-SiC MOSFETs.
Two different equations for the current through voltage-dependent capacitances are used in the literature. One equation is obtained from the time derivative of charge that is considered as ...capacitance-voltage product: <inline-formula> <tex-math notation="LaTeX">{\it dQ/dt=dC(V)V/dt=C(V)dV/dt+VdC(V)/dt.} </tex-math></inline-formula> In the second equation, the term <inline-formula> <tex-math notation="LaTeX">{\it VdC(V)/dt} </tex-math></inline-formula> does not exist: <inline-formula> <tex-math notation="LaTeX">{\it dQ/dt=} {\it C(V)dV/dt} </tex-math></inline-formula>. This paper clears the ongoing confusion caused by the difference between these two equations. We use the voltage-dependent parasitic capacitance of a commercial Schottky diode in reverse bias mode to test experimentally both equations. The result is that it is incorrect to add the term <inline-formula> <tex-math notation="LaTeX">{\it VdC(V)/dt} </tex-math></inline-formula> in the first equation with the measured capacitance. We also perform a theoretical analysis, which shows that the differential capacitance, <inline-formula> <tex-math notation="LaTeX">{\it C(V)=dQ/dV} </tex-math></inline-formula>, in the correct current equation corresponds to the physical parameters of the diode capacitance.
Analysis of the switching losses in a power MOSFET is crucial for the design of efficient power electronic systems. Currently, the state-of-the-art technique is based on measured drain current and ...drain-to-source voltage during the switching intervals. However, this technique does not separate the switching power due to the resistance of the MOSFET channel and due to the parasitic capacitances. In this paper, we propose a measurement method to extract the power dissipation due to the parasitic capacitances of a MOSFET, providing useful information for device selection and for the design of efficient power electronic systems. The proposed method is demonstrated on a basic boost converter. The proposed method shows that the existing method underestimates the turn-On losses by 41% and overestimates the turn-Off losses by 35%.
The accuracy in electrical model parameters of solar photovoltaic (PV), such as photon current, the diode dark saturation current, series resistance, shunt resistance, and diode ideality factor, are ...desirable to predict the real performance characteristics of solar PV under varying environment conditions. First, this paper derives mathematical model of solar PV, in terms of two unknown, namely, series resistance and ideality factor. Then, using combination of analytical method, simulated annealing method, and derived model, a new parameter estimation technique has been proposed. Finally, performance indices, such as PV characteristics curve, relative maximum power error, root mean square deviation, and normalized root mean square deviation are estimated for the various solar PV panels, using proposed and existing methods, to reveal the effectiveness of the proposed method. Also, experimental data have been considered for the validation. Finally, through the comparative analysis of the results, it is revealed that the proposed method offers solar PV characteristics more closer to the real characteristics than the other existing methods.
The suboptimal performance and low channel-carrier mobility of silicon carbide (SiC) power MOSFETs are attributed to a high density of oxide traps near the 4H-SiC/SiO<inline-formula> <tex-math ...notation="LaTeX">_{\text{2}}</tex-math> </inline-formula> interface. In this article, a commercial 1200-V SiC trench MOSFET has been compared with a planar MOSFET obtained from the same manufacturer. We employed a newly developed integrated-charge method to quantify the near-interface traps (NITs). The results reveal that, at operating gate voltages, 15% of the total channel electrons were trapped for longer than 500 ns in the planar MOSFET compared to 9% in the trench MOSFET.
The parasitic capacitances of semiconductor power devices that contribute to the switching losses are voltage dependent, which can make calculations of their stored energy difficult. Typically, ...manufacturers will provide effective capacitance values to aid in circuit design and component selection. However, stored energy calculations using these effective capacitor values are erroneous. In this letter, we derive a new equation for the stored energy in the voltage-dependent capacitance associated with a semiconductor depletion region, such as in diodes and transistors. In particular, we show that the ½ term in ½ CV 2 should be replaced by a new term γ , which depends on the device structure. By applying our proposed method to several commercial diodes and transistors, we show that it matches the measured data much better than using the effective capacitances. The proposed equation will enable better power circuit design by improving the accuracy of stored energy calculations.