Measurements are presented of the reduction of signal output due to radiation damage for plastic scintillator tiles used in the hadron endcap (HE) calorimeter of the CMS detector. The tiles were ...exposed to particles produced in proton-proton (pp) collisions at the CERN LHC with a center-of-mass energy of 13 TeV, corresponding to a delivered luminosity of 50 fb$^{-1}$. The measurements are based on readout channels of the HE that were instrumented with silicon photomultipliers, and are derived using data from several sources: a laser calibration system, a movable radioactive source, as well as hadrons and muons produced in pp collisions. Results from several irradiation campaigns using $^{60}$Co sources are also discussed. The damage is presented as a function of dose rate. Within the range of these measurements, for a fixed dose the damage increases with decreasing dose rate.
Belle II Silicon Vertex Detector Dutta, D.; Adamczyk, K.; Aziz, T. ...
Journal of instrumentation,
02/2017, Letnik:
12, Številka:
2
Journal Article
Recenzirano
The Belle II experiment at the SuperKEKB asymmetric energy e super(+)e super(-) collider in KEK, Japan will operate at an instantaneous luminosity 40 times larger than that of its predecessor, Belle. ...It is built with an aim of collecting a huge amount of data (50 ab super(-1) by 2025) for precise CP violation measurements and new physics search. Thus, we need an accurate vertex determination and reconstruction of low momentum tracks which will be achieved with the help of vertex detector (VXD). The Belle II VXD consists of two layers of DEPFET pixels ('Pixel Detector') and four layers of double-sided silicon microstrip sensors ('Silicon Vertex Detector'), assembled over carbon fibre ribs. In this paper, we discuss about the Belle II Silicon Vertex Detector, especially its design and key features; we also present its module ('ladder') assembly and testing procedures.
The upgrade of the Belle II experiment plans to use a vertex detector based on two different technologies, DEPFET pixel (PXD) technology and double side silicon microstrip (SVD) technology. The ...vertex electronics are characterized by the topology of SVD bias that forces to design a sophisticated grounding because of the floating power scheme. The complex topology of the PXD power cable bundle may introduce some noise inside the vertex area. This paper presents a general overview of the EMC issues present in the vertex system, based on EMC tests on an SVD prototype and a study of noise propagation in the PXD cable bundle based on Multi-conductor transmission line theory.
The Belle II Silicon Vertex Detector comprises four layers of double-sided silicon strip detectors (DSSDs), consisting of ladders with two to five sensors each. All sensors are individually read out ...by APV25 chips with the Origami chip-on-sensor concept for the central DSSDs of the ladders. The chips sit on flexible circuits that are glued on the top of the sensors. This concept allows a low material budget and an efficient cooling of the chips by a single pipe per ladder. We present the construction of the first SVD ladders and results from precision measurements and electrical tests.
The paper describes the development of the dynamic models of a number of commonly used test power systems in OPAL-RT real-time simulator environment. The process of building the dynamic test cases is ...described, and the challenges faced during such development are discussed. The performance of the dynamic test cases is investigated under various disturbances such as single-line-to-ground fault, line outages, step load change, and tap changing of on-load tap changers.
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