Nanoimprint lithography is a high-resolution, high-throughput and cost-effective nanopatterning technology. However, the overlay accuracy is lagging behind the resolution because of the high cost of ...mechanical precision. We have built an inexpensive stand-alone machine based on the wafer bowing nanoimprint process, and demonstrated single-point overlay of two transferred pattern layers with an accuracy of ≤60 nm.
We examined the influence of memristor geometry on switching endurance by comparing ribbed and planar TiO(2)-based cross-point devices with 50 nm × 50 nm lateral dimensions. We observed that planar ...devices exhibited a factor of over four improvement in median endurance value over ribbed structures for otherwise identical structures. Our simulations indicated that the corners in the upper wires of the ribbed devices experienced higher current density and more heating during device forming and switching, and hence a shorter life time.
Indium phosphide (InP) nanowires were grown by metal organic chemical vapor deposition on hydrogenated silicon (Si:H) surfaces prepared on various non-single crystal substrates. Structural and ...chemical properties of the nanowires were characterized by scanning electron microscopy, energy dispersive spectroscopy, and X-ray diffraction, elucidating the effect of varying the non-single crystal substrate on nanowire growth. A technique for growing InP nanowires on various non-single crystal substrates, including metals and dielectrics was demonstrated.
We report a field configurable transistor (FCT) fabricated on a Si nanowire FET platform by integrating a thin film of conjugated polymer poly2-methoxy-5-(2′-ethylhexyloxy)-p-phenylene vinylene ...(MEH-PPV) and an ionic conductive layer (RbAg4I5) into the gate. The FCT can be precisely configured to desired nonvolatile analog state dynamically, repeatedly, and reversibly by controlling the concentration of iodide ions in the MEH-PPV layer with a gate voltage. The flexible configurability and plasticity of the FCT could facilitate field-programmable circuits for defect-tolerance and synapse-like devices for learning.
We demonstrate a high-speed polarization-insensitive photoconductor based on intersecting InP nanowires synthesized between a pair of hydrogenated silicon electrodes deposited on amorphous SiO
2
...surfaces prepared on silicon substrates. A 14-ps full width at half maximum de-embedded impulse response is measured, which is the fastest reported response for a photodetector fabricated using nanowires. The high-speed electrical signal measurements from the photoconductor are performed by an integrated coplanar waveguide transmission line. The demonstrated ability to grow intersecting InP nanowires on hydrogenated microcrystalline Si surfaces will facilitate the construction of ultra-fast photodetectors on a wide range of substrates.
A new route to grow an ensemble of indium phosphide single-crystal semiconductor nanowires is described. Unlike conventional epitaxial growth of single-crystal semiconductor films, the proposed route ...for growing semiconductor nanowires does not require a single-crystal semiconductor substrate. In the proposed route, instead of using single-crystal semiconductor substrates that are characterized by their long-range atomic ordering, a template layer that possesses short-range atomic ordering prepared on a non-single-crystal substrate is employed. On the template layer, epitaxial information associated with its short-range atomic ordering is available within an area that is comparable to that of a nanowire root. Thus the template layer locally provides epitaxial information required for the growth of semiconductor nanowires. In the particular demonstration described in this paper, hydrogenated silicon was used as a template layer for epitaxial growth of indium phosphide nanowires. The indium phosphide nanowires grown on the hydrogenerated silicon template layer were found to be single crystal and optically active. Simple photoconductors and pin-diodes were fabricated and tested with the view towards various optoelectronic device applications where group III–V compound semiconductors are functionally integrated onto non-single-crystal platforms.
Using memristors, such as oxide and phase change resistive switches, as tunable resistors to construct analog computing hardware accelerators is gaining keen attention. Such accelerators have ...demonstrated the potential to significantly outperform digital computers in highly relevant applications such as machine learning and image processing. However, improvements in device‐level performance of memristors, including reducing power consumption and high current–induced metal migration in interconnects, need continued developments. Nanoscaling and complementary metal‐oxide semiconductor (CMOS) integration are also of significant importance in commercialization of such accelerators. Here tantalum oxide memristors scaled down to 25 nm sizes and integrated on CMOS transistor circuits are presented. The memristor conductance is programmable with a 6 order‐of‐magnitude operating range, especially with 3‐bits below 10 µS for low current operation. The stability of such levels and the size scaling of the operating parameters are further studied. These results will aid device engineering of memristors and bolster development of neuromorphic hardware accelerators.
Improved performance of memristors with very low conductance levels (<10 µS) and very high tunability of conductances across a large on–off ratio (over 6 orders of magnitude) are demonstrated. This paves the path for many low‐power electronic applications, while the results are attractive especially for highly energy‐efficient neuromorphic computing applications.
We have developed a process for fabricating monodisperse noble metal/rare earth disilicide core−shell nanoparticles and nanowires in regular arrays on Si(001) with a density of 5 × 1010 / cm2, and ...over areas >1 mm2. Pt deposited via physical vapor deposition on a self-assembled rare earth disilicide nanowire template combined with reactive ion etching produces arrays of nanostructures. SEM images demonstrate the ability to select nanowires or nanoparticles as a function of Pt coverage. Statistical analysis of images of Pt nanoparticle arrays yield a mean feature size of 8 nm with a size variation of ±0.9 nm and interparticle spacing of approximately 15 nm.
We propose memristor-based TCAMs (Ternary Content Addressable Memory) circuits to accelerate Regular Expression (RegEx) matching through in memory processing of finite automata. RegEx matching is a ...key function in network security to find malicious actors. However, RegEx matching latency and power can be incredibly high and current proposals are challenged to perform wire-speed matching for large rulesets. Our approach dramatically decreases operating power, enables high throughput, and the use of nanoscale memristor TCAM circuits (mTCAMs) enables compression techniques to expand rulesets. We fabricated and demonstrated nanoscale memristor TCAM cells. SPICE simulations investigate performance at scale and a mTCAM dynamic power model using 16 nm layout parameters demonstrates ~0.2 fJ/bit/search energy for a 36 × 250 mTCAM array. A tiled architecture is proposed to implement a Snort ruleset and assess application performance. Compared to a state-of-the-art FPGA approach (2 Gbps, ~1 W), we show ×4 throughput (8 Gbps) at 55% the power (0.55 W) without standard TCAM power-saving techniques. Our performance comparison improves further when striding (searching multiple characters at once) is considered, resulting in 47.2 Gbps at 1.2 W for our approach compared to 3.9 Gbps at 630 mW for strided FPGA NFA, demonstrating a promising path to wire-speed RegEx matching on large scale rulesets.
We fabricated and measured the far-field optical properties of a sub-wavelength Si
3
N
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(silicon nitride) two dimensional grating. Frequency-dependent transmission measurements from a white-light ...source revealed that both transverse magnetic (TM) and transverse electric (TE) modes were excited on the grating. We determined the dispersion relations of the modes by tilting the sample with respect to the incoming light beam and measuring the frequency shift of the absorption features. By comparing to a simple model, we determined the effective refractive index for the TM and TE modes and the geometrical constants for the grating. This information enables gratings with desired optical properties to be designed and fabricated. The application of the sub-wavelength grating for surface-enhanced Raman scattering (SERS) is demonstrated.
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