The upgrade of the ATLAS experiment at LHC foresees the insertion of an innermost silicon layer, called the Insertable B-layer (IBL). The IBL read-out system will be equipped with new electronics. ...The Readout-Driver card (ROD) is a VME board devoted to data processing, configuration and control. A pre-production batch has been delivered for testing with instrumented slices of the overall acquisition chain, aiming to finalize strategies for system commissioning. In this paper system setups and results will be described, as well as preliminary studies on changes needed to adopt the ROD for the ATLAS Pixel Layers 1 and 2.
In 2014 the Insertable B-Layer (IBL) will extend the existing Pixel Detector of the ATLAS experiment at CERN by over 12 million additional pixels. For calibration and monitoring purposes, occupancy ...and time-over-threshold data are being histogrammed in the read-out hardware. Further processing of the histograms happens on commodity hardware, which not only requires the fast transfer of histogram data from the read-out hardware to the computing farm via Ethernet, but also the integration of the software and hardware into the already existing data-acquisition and calibration framework (TDAQ and PixelDAQ) of the ATLAS experiment and the current Pixel Detector. We implement the software running on the compute cluster with an emphasis on modularity, allowing for flexible adjustment of the infrastructure and a good scalability with respect to the number of network interfaces, available CPU cores, and deployed machines. By using a modular design we are able to not only employ CPU-based fitting algorithms, but also have the possibility to take advantage of the performance offered by a GPU-based approach to fitting.
The IBL readout system Dopke, J; Falchieri, D; Flick, T ...
Journal of instrumentation,
01/2011, Letnik:
6, Številka:
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The first upgrade for the ATLAS Pixel Detector will be an additional layer, which is called IBL (Insertable B-Layer). To readout this new layer, built from new electronics, an update of the readout ...electronics is necessary. The aim is to develop a system which is capable to read out at a higher bandwidth, but also compatible with the existing system to be integrated into it. This paper describes the necessary development to reach a new readout system, concentrating on the requirements of a newly designed Back of Crate card as the optical interface in the counting room.
The ATLAS experiment at LHC planned to upgrade the existing Pixel Detector with the insertion of an innermost silicon layer, called Insertable B-layer (IBL). A new front-end ASIC has been foreseen ...(named FE-I4) and it will be read out with improved off-detector electronics. In particular, the new Read-Out Driver card (ROD) is a VME-based board designed to process a fourfold data throughput. Moreover, the ROD hosts the electronics devoted to control operations whose main tasks are providing setup busses to access configuration registers on several FPGAs, receiving configuration data from external PCs, managing triggers and running calibration procedures. In parallel with a backward-compatible solution with a Digital Signal Processor (DSP), a new ROD control circuitry with a PowerPC embedded into an FPGA has been implemented. In this paper the status of the PowerPC-based control system will be outlined with major focus on firmware and software development strategies.
MCC: the Module Controller Chip for the ATLAS Pixel Detector Beccherle, R; Darbo, G; Gagliardi, G ...
Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment,
10/2002, Letnik:
492, Številka:
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In this article we describe the architecture of the Module Controller Chip for the ATLAS Pixel Detector. The project started in 1997 with the definition of the system specifications. A first ...fully-working rad-soft prototype was designed in 1998, while a radiation hard version was submitted in 2000. The 1998 version was used to build pixel detector modules. Results from those modules and from the simulated performance in ATLAS are reported. In the article we also describe the hardware/software tools developed to test the MCC performance at the LHC event rate.
The ATLAS silicon pixel sensors Alam, M.S; Ciocio, A; Einsweiler, K ...
Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment,
01/2001, Letnik:
456, Številka:
3
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Prototype sensors for the ATLAS silicon pixel detector have been developed. The design of the sensors is guided by the need to operate them in the severe LHC radiation environment at up to several ...hundred volts while maintaining a good signal-to-noise ratio, small cell size, and minimal multiple scattering. The ability to be operated under full bias for electrical characterization prior to attachment of the readout integrated circuit electronics is also desired.
An additional inner layer for the existing ATLAS Pixel Detector, called Insertable B-Layer (IBL), is under design. The front-end electronics features a new readout ASIC, named FE-14, which requires ...new off-detector electronics, currently realized with two VME-based boards: the Back Of Crate module (BOC) implements optical I/O functionality and the ReadOut Driver module (ROD) implements data processing functionality, plus a Timing Interface Module (TIM). This paper presents a proposal for the IBL readout system, mainly focusing on the ROD board.
An additional inner layer for the existing ATLAS Pixel Detector, called Insertable B-Layer (IBL), is under design and it will be installed by Phase I. New front-end readout ASICs fabrication (FE-I4) ...will replace the previous chips in this layer. The new system features higher readout speed - 160Mb/s per ASIC - and simplified control. The current data acquisition chains are composed of front-end and readout chips, Back-Of-Crate (BOCs) cards and ReadOut Driver cards (RODs). This paper presents a proposal for the new ROD board, which implements modern FPGAs and high-speed links with the detector and with the ATLAS TDAQ system.
Electrical characteristics of silicon pixel detectors Gorelov, I; Gorfine, G; Hoeferkamp, M ...
Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment,
2002, Letnik:
489, Številka:
1
Journal Article
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Prototype sensors for the ATLAS silicon pixel detector have been electrically characterized. The current and voltage characteristics, charge-collection efficiencies, and resolutions have been ...examined. Devices were fabricated on oxygenated and standard detector-grade silicon wafers. Results from prototypes which examine p-stop and standard and moderated p-spray isolation are presented for a variety of geometrical options. Some of the comparisons relate unirradiated sensors with those that have received fluences relevant to LHC operation.
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