Monolayer graphene exhibits exceptional electronic and mechanical properties, making it a very promising material for nanoelectromechanical devices. Here, we conclusively demonstrate the ...piezoresistive effect in graphene in a nanoelectromechanical membrane configuration that provides direct electrical readout of pressure to strain transduction. This makes it highly relevant for an important class of nanoelectromechanical system (NEMS) transducers. This demonstration is consistent with our simulations and previously reported gauge factors and simulation values. The membrane in our experiment acts as a strain gauge independent of crystallographic orientation and allows for aggressive size scalability. When compared with conventional pressure sensors, the sensors have orders of magnitude higher sensitivity per unit area.
Silicon nanowires (SiNWs) are a widely used technology for sensing applications. Complementary metal-oxide-semiconductor (CMOS) integration of SiNWs advances lab-on-chip (LOC) technology and offers ...opportunities for read-out circuit integration, selective and multiplexed detection. In this work, we propose novel scalable pixel-based biosensors exploiting the integration of SiNWs with CMOS in fully-depleted silicon-on-insulator technology. A detailed description of the wafer-scale fabrication of SiNW pixels using the CMOS compatible sidewall-transfer-lithography as an alternative to widely investigated time inefficient e-beam lithography is presented. Each 60 nm wide SiNWs sensor is monolithically connected to a control transistor and novel on-chip fluid-gate forming an individual pixel that can be operated in two modes: biasing transistor frontgate (VG) or substrate backgate (VBG). We also present the first electrical results of single N and P-type SiNW pixels. In frontgate mode, N and P-type SiNW pixels exhibit subthreshold slope (SS) 70-80 mV/dec and Ion/Ioff 105. The N-type and P-type pixels have an average threshold voltage, Vth of −1.7 V and 0.85 V respectively. In the backgate mode, N and P-type SiNW pixels exhibit SS 100-150 mV/dec and Ion/Ioff 106. The N and P-type pixels have an average Vth of 5 V and −2.5 V respectively. Further, the influence of the backgate and frontgate voltage on the switching characteristics of the SiNW pixels is also studied. In the frontgate mode, the Vth of the SiNW pixels can be tuned at 0.2 V for 1 V change in VBG for N-type or at −0.2 V for −1 V change in VBG for P-type pixels. In the backgate mode, it is found that for stable operation of the pixels, the VG of the N and P-type transistors must be in the range 0.5-2.5 V and 0 V to −2.5 V respectively.
Vertical graphene-based device concepts that rely on quantum mechanical tunneling are intensely being discussed in the literature for applications in electronics and optoelectronics. In this work, ...the carrier transport mechanisms in semiconductor-insulator-graphene (SIG) capacitors are investigated with respect to their suitability as electron emitters in vertical graphene base transistors (GBTs). Several dielectric materials as tunnel barriers are compared, including dielectric double layers. Using bilayer dielectrics, we experimentally demonstrate significant improvements in the electron injection current by promoting Fowler-Nordheim tunneling (FNT) and step tunneling (ST) while suppressing defect mediated carrier transport. High injected tunneling current densities approaching 10
3
A cm
−2
(limited by series resistance), and excellent current-voltage nonlinearity and asymmetry are achieved using a 1 nm thick high quality dielectric, thulium silicate (TmSiO), as the first insulator layer, and titanium dioxide (TiO
2
) as a high electron affinity second layer insulator. We also confirm the feasibility and effectiveness of our approach in a full GBT structure which shows dramatic improvement in the collector on-state current density with respect to the previously reported GBTs. The device design and the fabrication scheme have been selected with future CMOS process compatibility in mind. This work proposes a bilayer tunnel barrier approach as a promising candidate to be used in high performance vertical graphene-based tunneling devices.
Bilayer dielectric tunnel barriers in graphene-based electron injection tunnel diodes show high tunneling current densities due to step tunneling.
Silicon nanowire (SiNW) biosensors have received a special attention from the research community due to its ability to detect a range of species. The nano feature size of the SiNW has been exploited ...to fabricate small, low-cost, robust, portable, real-time read-out biosensors. These sensors are manufactured by two methods – top-down or bottom-up. Instead of the bottom-up method, the top-down approach is widely used due to its compatibility with complementary metal-oxide semiconductor (CMOS) process and scope of mass production. However, in the top-down method, the post fabrication microfluidic channel integration to access the SiNW test site remains complex and challenging. Since the nanosensor is expected to operate in a bio environment, it is essential to passivate the metal electrodes while pathways have to be made to access the test site. In this paper, we present a relatively easier method to access the SiNW test site without employing complex microfluidic channels while achieving leakage free passivation of metal electrodes and preserving the integrity of the nanosensor. This is accomplished in the last step of the manufacturing process by employing a lithography mask and reactive ion etching (RIE). HfO2 integrated crystalline silicon nanosensors are manufactured using novel top-down front end of line (FEOL) sidewall transfer lithography (STL) process. HfO2 acts as an etch stop layer while performing RIE in the last step to access the sensor test site. The 100 mm wafer scale results of 20 nm × 60 nm × 6 μm (H x W x L) p-type nanosensors shows an average Ion/Ioff ≥ 105 with maximum turn-on voltage of −4 V and uniform subthreshold slope of 70 mV/dec. In comparison with sensors encapsulated with SiO2, the HfO2 integrated nanosensors were found to improve the threshold voltage variation by 50%. Based on this work, the HfO2 integrated SiNW demonstrates good stability for biosensing application.
•Access to SiNW site without complex microfluidics using lithography and dry etching.•100 mm wafer scale integration of HfO2 with SiNW in CMOS compatible scheme.•Study of selectivity of HfO2 towards CHF3/CF4/O2 plasma and HF wet etch processes.•Easing the access to SiNW test site utilizing the robust etch stop nature of HfO2.•Study of VTH, SS and ION/IOFF of SiNW before and after opening access to test site.•Comparative study on the electrical stability between SiO2 encapsulated versus SiO2/HfO2 embedded SiNW sensors.
Graphene has extraordinary mechanical and electronic properties, making it a promising material for membrane based nanoelectromechanical systems (NEMS). Here, three methods for direct transfer of ...chemical vapor deposited graphene onto pre-fabricated micro cavity substrates were investigated and analyzed with respect to yield and quality of the free-standing membranes on a large-scale. An effective transfer method for layer-by-layer stacking of graphene was developed to improve the membrane stability and thereby increase the yield of completely covered and sealed cavities. The transfer method with the highest yield was used to fabricate graphene NEMS devices. Electrical measurements were carried out to successfully demonstrate pressure sensing as a possible application for these graphene membranes.
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•Investigation of CVD graphene transfer methods for fabricating suspended membranes•Development of a method to stack layer-by-layer graphene to improve stability of the membranes•Successful fabrication and electrical characterization of graphene based pressure sensor•Scalable and large-area fabrication of graphene membrane based NEMS devices
It is now widely recognized that continued performance gains in electronic computing will require new materials, both in the short and long term. In the short term, the silicon channel in transistors ...will be replaced by materials with higher mobility that are easier to “scale” (make thinner). In data storage, the goal is to have fast, non-volatile memory with a smaller cell size. In the long term, new architectures and new types of logic devices will be needed in order to further reduce power consumption. New materials cannot only boost performance, but can also add new functionalities, such as on-chip photonics, which can vastly improve interchip interconnects. The need for new materials is a big opportunity for materials research, but also a challenge. Replacement technologies must outperform conventional silicon technology, but also be compatible with the vast infrastructure of silicon manufacturing. Examples of some of the materials advances in the areas of computation, memory, and communication are given in this issue of MRS Bulletin.
This paper reviews the experimental and theoretical state of the art in ballistic hot electron transistors that utilize two-dimensional base contacts made from graphene, i.e. graphene base ...transistors (GBTs). Early performance predictions that indicated potential for THz operation still hold true today, even with improved models that take non-idealities into account. Experimental results clearly demonstrate the basic functionality, with on/off current switching over several orders of magnitude, but further developments are required to exploit the full potential of the GBT device family. In particular, interfaces between graphene and semiconductors or dielectrics are far from perfect and thus limit experimental device integrity, reliability and performance.
This work presents epitaxial growth of intrinsic and doped GeSnSiC layers using Ge2H6, SnCl4, CH3SiH3, B2H6, PH3 and Si2H6 deposited at 290–380°C on strain relaxed Ge buffer layer or Si substrate by ...using reduced pressure chemical vapor deposition (RPCVD) technique. The GeSnSi layers were compressively strained on Ge buffer layer and strain relaxed on Si substrate. It was demonstrated that the quality of epitaxial layers is dependent on the growth parameters and that the Sn content in epi-layers could be tailored by growth temperature. The Sn segregation caused surface roughness which was decreased by introducing Si and Si-C into Ge layer.
The Sn content in GeSn was carefully determined from the mismatch, both parallel and perpendicular, to the growth direction when the Poisson ratio was calculated for a certain Ge-Sn composition. The X-ray results were excellently consistent with Rutherford Backscattered Spectroscopy (RBS). Strain relaxed GeSn layers were also used as virtual substrate to grow tensile-strained Ge layers. The Ge cap layer had low defect density and smooth surface which makes it a viable candidate material for future photonic applications.
•GeSnSiC layers have been grown at 290–380°C using RPCVD technique.•Sn segregation depends on temperature and strain, and causes surface roughness.•Sn incorporation and GeSn surface smoothness increase by integration of Si or Si-C.•B/P- doped GeSn with high epitaxial quality and low sheet resistance were obtained.•Using GeSn as virtual substrate, tensile Ge was grown with low defect density.
Novel structures of intrinsic or carbon-doped multi quantum wells (MQWs) and intrinsic or carbon-doped Si Schottky diodes (SD), individually or in combination, have been manufactured to detect the ...infrared (IR) radiation. The carbon concentration in the structures was 5×1020cm−3 and the MQWs are located in the active part of the IR detector. A Schottky diode was designed and formed as one of the contacts (based on NiSi(C)/TiW) to MQWs where on the other side the structure had an Ohmic contact. The thermal response of the detectors is expressed in terms of temperature coefficient of resistance (TCR) and the quality of the electrical signal is quantified by the signal-to-noise ratio. The noise measurements provide the K1/f parameter which is obtained from the power spectrum density. An excellent value of TCR=−6%/K and K1/f=4.7×10−14 was measured for the detectors which consist of the MQWs in series with the SD. These outstanding electrical results indicate a good opportunity to manufacture low cost Si-based IR detectors in the near future.
•SiGe (C)/Si(C) multi quantum wells (MQWs) are evaluated to detect IR radiation.•Schottky diodes (SDs), individually or in series with MQWs are also fabricated.•Detectors consisted of MQWs in series with SD show excellent thermal sensing.•The noise values are also extremely low for MQWs in series with SD.
For logic gate with higher voltage swing, 4H-SiC pseudo-CMOS logic inverter with four nMOS was suggested and demonstrated, and a high voltage swing of 4.4 V was achieved at V DD =5 V. Simple nMOS ...inverters were also investigated. Both of pseudo-CMOS and nMOS inverters were operated at a high temperature of 200°C. For future SiC large integrated circuits, junction leakage current between n+ regions were also investigated with the comb-shaped test elements.
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