The continuous process of miniaturization in the microelectronics industry requires the introduction of new, thinner interlayer dielectric (ILD) materials with poorer mechanical properties. As a ...consequence, new mechanical characterization techniques are needed in the industry to evaluate very thin films. This work presents a new fracture characterization technique for thin films, called “dual tip indentation” (DTI). The technique takes advantage of a particular geometry of the indentation tip to provoke shallow and controlled cracking on the targeted brittle thin film. The technique is applied to the fracture characterization of two different ILD with four thicknesses, ranging from 100nm to 500nm. Further fractographic analysis, along with finite element modeling, shows that it is possible to extract intrinsic fracture properties from the fracture load. The technique allows one to discriminate between the ILD and, for both materials, 100nm films show lower strength. No effect of film thickness on strength is observed in the range between 200 and 500nm. The results from DTI compare well with those previously obtained for the same materials from membrane testing, taking into account the differences in volume tested.
Microelectronic industry is driven by the continuous miniaturization process conducing to the introduction of materials with better performance. These materials are subjected to stresses mainly due ...to thermal mismatch, microstructural changes or process integration which can be in the origin of mechanical reliability issues. To study these phenomena and even electromigration a good mechanical characterization of the materials is needed. This work aims at developing tests to assess fracture and elastoplastic behavior of thin Cu films. The tests developed are based on the deflection of microbeams (micromachined using a focused ion beam) using a nanoindenter. Different test geometries for microbeams have been evaluated and quantitative data have been obtained combining experimental results with analytical or numerical models, depending on the property under study. Microbeam response shows a strong dependence on the orientation of the grains close to the fixed end. Grain orientation has been measured by electron backscatter diffraction and the plastic behavior has been modeled by the finite element method using an in-house crystal plasticity subroutine. The effect of film thickness on fracture energy has been determined from tests of notched beams.
•Cu microbeams have been machined with a focused ion beam and tested at a TriboIndenter.•Crystal plasticity has been accounted for when modeling constitutive behavior of Cu.•Fracture energy has been calculated using notched microcantilever beams.•Fracture energy decreases with film thickness.
The continuous miniaturization process in the microelectronic industry, along with the introduction of Interlayer Dielectrics (ILDs) with poorer mechanical properties, makes necessary the development ...of characterization techniques to evaluate the mechanical performance of very thin films. This work presents a mechanical characterization technique for thin films based on membrane testing. Membranes, micromachined with anisotropic wet etching of Si, are tested to fracture using a nanoindenter to apply the load and register the provoked deflection. The technique is applied to the fracture characterization of two different ILDs with four thicknesses ranging from 100nm to 500nm. Combination of experiments and finite element simulations allows for the calculation of the strength of the materials from the fracture load. The technique permits to discriminate both ILDs and to establish clear thickness dependence: for both materials, 100nm films show a significant lower strength while no effect of film thickness on strength is observed in the range between 200 and 500nm. A sensitivity analysis of the outcome of the technique, the fracture stress, to the variability of the input parameters is presented, showing the robustness of the proposed approach: the experimental error in the fracture stress is smaller than the variation in the input parameters.
•Ceramic dielectric membranes have been micromachined and tested using a nanoindenter.•Constitutive behavior and residual stresses of the films are obtained through modeling.•Fracture loads and stresses allow classifying thin films.•Films 100nm thick show a weaker behavior than the thicker ones.
The cross-sectional nanoindentation (CSN) technique is extended to examine the fracture properties of thin film metal–ceramic interfaces. The methodology includes the selection of appropriate ...indentation parameters to achieve controlled interfacial delamination together with finite element modelling to estimate the contribution of plasticity of the metallic film to the overall interfacial fracture process. The results show good agreement with four-point bending, a method commonly used to measure thin film interfacial toughness, provided that mode mixities are similar. In addition, CSN allows observation of the interfacial crack by scanning electron microscopy and a local measurement of adhesion, with debonded areas in the range of 100–1000 μm
2. The numerical modelling of the test provides an estimate of the intrinsic interfacial adhesion energy, separating the effects of metal plasticity.
This paper presents the key silicon features of Intel's 3D stacking technology, Foveros, as it is used to enable logic-on-logic die stacking. A robust face-to-face die connection is enabled with a ...high yielding, robust microbump connection. Additionally, we describe the low resistance TSVs used for connection to the package along with their electrical properties.
A testing technique based on cross-sectional nanoindentation has been used to assess the mechanical reliability of interconnect structures. A Berkovich indenter was used to initiate fracture in a ...silicon substrate and cracks propagated through the structure. To better control crack growth and to convert the problem into two dimensions, a trench parallel to the indentation surface was previously machined using a focused ion beam. The crack lengths obtained for different material systems in the interconnect structure correlate well with the fracture energies measured for the same materials in blanket films. Finite element model simulations incorporating cohesive elements have been used to model the fracture processes and to explain the different cracking behaviour observed.
Interfacial adhesion is becoming a critical material property for improving the reliability of multilayer thin film structures used in microelectronics. Cross-sectional nanoindentation (CSN) is a new ...mechanical test especially designed for measuring the fracture toughness of thin film interfaces. Interfacial fracture is achieved by nanoindentation in the structure cross-section. A model based on the elastic plate theory has been developed to calculate numerically the interfacial critical energy release rate (
G
ci) for ceramic–ceramic systems from CSN test results. The model inputs are the thin film elastic properties, thin film thickness, interfacial crack area and maximum thin film deflection during the test. Closed form analytical solutions, obtained for two limiting cases, are consistent with the numerical approach. This technique has been successfully applied to silicon nitride–silicon oxide thin films, commonly used as electrical isolators in microelectronic devices.
L'adhésion interfaciale s'avère être une propriété critique pour l'amélioration de la fiabilité des structures à pellicules minces utilisées dans le domaine de la microéléctronique. L'éssai de nanoindentation en section transversale constitue une nouvelle technique développée pour mesurer la ténacité interfaciale à fracture des pellicules minces. Un modèle basé sur la théorie élastique des plaques a été développé pour calculer numériquement la vitesse de libération d'énergie interfaciale à fracture (
G
ci) pour des systèmes céramique–céramique. Les données du modèle sont les propriétés élastiques des pellicules minces, leur épaisseur, l'aire interfaciale délaminée et la déflexion maximale subie par la pellicule mince. Des solutions analytiques obtenues pour deux cas limite approximent correctement la solution numérique. La technique développée a été appliquée avec succès à des couches nitrure de silicium–oxyde de silicium utilisées habituellement comme isolants électriques dans les dispositifs microéléctroniques.
This paper presents the results of a systematic study of curvature and stress evolution during thermal loading in single- and multilevel interconnect line structures which have been deposited on a ...much thicker substrate. Effects of line aspect ratio, passivation geometry, and metal density within a metalization level on thermal stress evolution in the lines are addressed. The current analytical stress model enables us to predict that interaction between lines on the same level, i.e., in the lateral direction, is so strong that it cannot be neglected. A two-dimensional (2-D) finite element method has been used to verify the accuracy of the current model, while available experimental data have been compared with theory. In order to capture the exact variation of the thermal stresses at different metalization levels, and to investigate the effect of the upper level line arrangements on the stress states at the lower level, a three-dimensional (3-D) finite element analysis was employed. It can be seen that the interaction between levels in the vertical direction is quite weak when the thickness of the interlevel dielectric (ILD) layer becomes comparable to that of the metal layer.
The recent report of a high-yielding process with Back-Side Power Delivery (BSPD) using PowerVia, the benefits obtained on an Intel E-core implementation, and the imminent deployment of PowerVia in ...High- Volume Manufacturing (HVM), are driving a rapid expansion of R&D across the Si Industry to enable future deployments of this seminal innovation. One such example is the recent experimental demonstration of back-side contacts (BSCONs), which bring about performance and scaling benefits. In this paper, we will identify and discuss potential directions beyond PowerVia, and the key process advances required to enable them. Three key R&D thrusts will be discussed: (i) scaling of the BSPD, (ii) introduction of new functionality on the back-side interconnects stack beyond power delivery, and (iii) efficient device stacking.
This paper describes various measurements on self-heat performed on Intel's 22nm process technology, and outlines its reliability implications. Comparisons to thermal modeling results and analytical ...data show excellent matching.
