Abstract
A monolithic pixel sensor with small collection electrode and partially depleted sensor diode named HVMAPS25 has been implemented in the 180 nm technology of TSI semiconductors. The pixel ...size is 25 µm × 35 µm. The pixel electronics contains a fast and low power charge sensitive amplifier, a comparator, a threshold tuning DAC and a digital block that measures the arrival time of the hit with 10 bit resolution and the signal amplitude (time over threshold) with 6 bit resolution. A deep p-well has been used for isolation of the pixel electronics from the sensor substrate. The building blocks of the chip, simulations and the measurement results will be presented.
This paper presents a monolithic avalanche diode array designed in a commercial AMS 350 nm high-voltage CMOS (HV-CMOS) process. This monolithic detector comprises a single photon avalanche diode ...(SPAD), active quenching circuit and readout electronics. The SPAD consists of a p+ diffusion/n-well junction surrounded by a shallow p-well acting as a guard ring to prevent edge breakdown. The monolithic detector has a matrix of 20 × 15 pixels. The size of one SPAD pixel is 38 × 92 μm2. One pixel defined as SPAD and readout electronics has a total size of 115 × 111 μm2 with a fill factor = 24.3% and a chip size of about 2.8 × 2.6 mm2.
A large monolithic particle pixel-detector implemented as system on a chip in a high-voltage
0.35
μ
m
CMOS technology will be presented. The detector uses high-voltage n-well/p-substrate diodes as ...pixel-sensors. The diodes can be reversely biased with more than 60
V. In this way, depleted zones of about
10
μ
m
thickness are formed, where the signal charges can be collected by drift. Due to fast charge collection in the strong electric-field zones, a higher radiation tolerance of the sensor is expected than in the case of the standard MAPS detectors. Simple pixel-readout electronics are implemented inside the n-wells. The readout is based on a source follower with one select- and two reset-transistors. Due to embedding of the pixel-readout electronics inside the collecting electrodes (n-wells) there are no insensitive zones within the pixel matrix. The detector chip contains a 128×128 matrix consisting of pixels of
21
×
21
μ
m
2
-size. The diode voltages of one selected pixel-row are received at the bottom of the matrix by 128 eight-bit single-slope ADCs. All ADCs operate in parallel. The ADC codes are read out using eight LVDS 500
MBit/s output links. The readout electronics are designed to allow the readout of the whole pixel matrix in less than
50
μ
s
. The total DC power consumption of the chip is 50
mW. All analog parts of the chip are implemented using radiation-hard layout techniques. Experimental results will be presented.
In order to extend its discovery potential, the Large Hadron Collider (LHC) will have a major upgrade (Phase II Upgrade) scheduled for 2022. The LHC after the upgrade, called High-Luminosity LHC ...(HL-LHC), will operate at a nominal leveled instantaneous luminosity of 5x 10 super(34) cm super(?2) s super(?1), more than twice the expected Phase I . The new Inner Tracker needs to cope with this extremely high luminosity. Therefore it requires higher granularity, reduced material budget and increased radiation hardness of all components. A new pixel detector based on High Voltage CMOS (HVCMOS) technology targeting the upgraded ATLAS pixel detector is under study. The main advantages of the HVCMOS technology are its potential for low material budget, use of possible cheaper interconnection technologies, reduced pixel size and lower cost with respect to traditional hybrid pixel detector. Several first prototypes were produced and characterized within ATLAS upgrade R&D effort, to explore the performance and radiation hardness of this technology. In this paper, an overview of the HVCMOS sensor concepts is given. Laboratory tests and irradiation tests of two technologies, HVCMOS AMS and HVCMOS GF, are also given.
Active pixel sensors based on the High-Voltage CMOS technology are being investigated as a viable option for the future pixel tracker of the ATLAS experiment at the High-Luminosity LHC. This paper ...reports on the testbeam measurements performed at the H8 beamline of the CERN Super Proton Synchrotron on a High-Voltage CMOS sensor prototype produced in 180 nm AMS technology. Results in terms of tracking efficiency and timing performance, for different threshold and bias conditions, are shown.
Abstract A monolithic pixel sensor test chip for the PANDA micro-vertex detector has been implemented in a 180 nm HVCMOS technology on a high resistivity substrate. The sensor should have very high ...time resolution (1 ns sigma) and high dynamic range (up to 1000). The pixel electronics contains a charge sensitive amplifier, a feedback circuit and two comparators. One comparator receives the fast signal and enables accurate time measurement. The other comparator receives the low pass filtered signal and is used for precise amplitude measurement. This publication presents several novel features of the PANDA ASIC, its characterization and several measurement results.
The Compact Linear Collider (CLIC) is an option for a future
e
+
e
-
collider operating at centre-of-mass energies up to
3
TeV
, providing sensitivity to a wide range of new physics phenomena and ...precision physics measurements at the energy frontier. This paper is the first comprehensive presentation of the Higgs physics reach of CLIC operating at three energy stages:
s
=
350
GeV
, 1.4 and
3
TeV
. The initial stage of operation allows the study of Higgs boson production in Higgsstrahlung (
e
+
e
-
→
Z
H
) and
W
W
-fusion (
e
+
e
-
→
H
ν
e
ν
¯
e
), resulting in precise measurements of the production cross sections, the Higgs total decay width
Γ
H
, and model-independent determinations of the Higgs couplings. Operation at
s
>
1
TeV
provides high-statistics samples of Higgs bosons produced through
W
W
-fusion, enabling tight constraints on the Higgs boson couplings. Studies of the rarer processes
e
+
e
-
→
t
t
¯
H
and
e
+
e
-
→
H
H
ν
e
ν
¯
e
allow measurements of the top Yukawa coupling and the Higgs boson self-coupling. This paper presents detailed studies of the precision achievable with Higgs measurements at CLIC and describes the interpretation of these measurements in a global fit.
Celotno besedilo
Dostopno za:
DOBA, IZUM, KILJ, NUK, PILJ, PNG, SAZU, SIK, UILJ, UKNU, UL, UM, UPUK
Some improvements of classical Jensen's inequality are used to define the weighted mixed symmetric means. Exponential convexity and mean value theorems are proved for the differences of these ...improved inequalities. Related Cauchy means are also defined, and their monotonicity is established as an application.
A variant of Jensen’s operator inequality for convex functions, which is a generalization of Mercer’s result, is proved. Obtained result is used to prove a monotonicity property for Mercer’s power ...means for operators, and a comparison theorem for quasi-arithmetic means for operators.
Monolithic pixel detector implemented in 200 nm silicon-on-insulator technology for x-ray imaging applications will be presented. The detection is based on a fully-depleted high-resistance substrate, ...isolated by the buried silicon dioxide from the electronics layer. The pixel electronics contains a wide dynamic range integrator that is able to measure and to digitize the number of photons in a wide signal range. The detector is a simple and cheap alternative for the hybrid pixel imaging detectors. The experimental results obtained with the second prototype will be presented. The aimed application is the free electron laser.
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