The scaling of transistors to sub-10 nm dimensions is strongly limited by their contact resistance (R C). Here we present a systematic study of scaling MoS2 devices and contacts with varying ...electrode metals and controlled deposition conditions, over a wide range of temperatures (80 to 500 K), carrier densities (1012 to 1013 cm–2), and contact dimensions (20 to 500 nm). We uncover that Au deposited in ultra-high vacuum (∼10–9 Torr) yields three times lower R C than under normal conditions, reaching 740 Ω·μm and specific contact resistivity 3 × 10–7 Ω·cm2, stable for over four months. Modeling reveals separate R C contributions from the Schottky barrier and the series access resistance, providing key insights on how to further improve scaling of MoS2 contacts and transistor dimensions. The contact transfer length is ∼35 nm at 300 K, which is verified experimentally using devices with 20 nm contacts and 70 nm contact pitch (CP), equivalent to the “14 nm” technology node.
Using quantum transport simulations of metal-semiconductor junctions, we assess the viability of barrier thinning with dopants and barrier lowering with interfacial layers as solutions for contact ...resistivity in nanoscale transistors. Our atomistic simulations show that the discreteness of dopants leads to increasing variability in contact resistance as dimensions scale below 10 nm. We find that the use of interlayers can counteract low doping caused by atomistic variation, but the interlayer must have band edge Fermi level pinning to provide a net reduction in contact resistivity. For materials with low doping limits, such as n-type germanium, we find that interlayer contacts still have difficulty meeting resistivity targets.
Low Resistance Contacts to Nanoscale Semiconductor Devices Krishna C. Saraswat and Gautam Shine Department of Electrical Engineering, Stanford University, Stanford, CA, 94305 As device scaling ...continues, parasitic resistance largely dominated by contact resistance, is beginning to limit the device performance. Specific contact resistivity, ρc, of a metal-semiconductor (M/S) contact is dependent on the Schottky barrier height, ΦB, and the electrically active dopant density N at that interface. In M/S contacts the metal Fermi level is pinned at the charge neutrality level, ECNL due to metal induced gap states (MIGS), resulting in fixed electron and hole Schottky barrier heights. High ΦB and low N results in high ρc, eclipsing the promise of intrinsic performance of scaled devices. To obtain low ρc it is essential to reduce ΦB and increase N. In this paper we review the problem caused by Fermi level pinning and various methods to overcome this problem and thus obtain low contact resistance. These methods include heavy doping to reduce barrier thickness, Fermi level depinning with interfacial layers, dipole formation at the interface, and heterostructures for barrier lowering.
Specific contact resistivities of source/drain contacts employing interfacial layers are calculated with simulations of tunneling transport. Fermi level depinning, dipoles, and other techniques for ...barrier lowering are explored. Interfacial materials with the potential to meet future contact resistivity requirements are identified for silicon and high-mobility alternatives.
The continued scaling of semiconductor nanotechnology below 10 nanometer dimensions requires efficient injection of electrons across interfaces between devices and contacts. In this thesis we analyze ...transport in metal-semiconductor and metal-insulator junctions to quantify the conductance of these structures. This enables us to assess strategies for controlling contact resistivity and spin polarization for nanoelectronics and spintronics. First, we use density functional theory and Green's functions to decompose the resistance of metal-semiconductor junctions into the loss due to tunneling and the loss due to band structure mismatch. Second, we use atomistic Monte Carlo simulations to construct probability distributions of contact resistivity in the sub-10 nm regime, where the disorder due to discreteness of dopants is consequential. Third, we assess the effectiveness of shifting the pinning of Fermi levels using interfacial layers inserted between the metal and the semiconductor. Finally, we consider the case of spin-polarized transport in tunnel junctions where the impact of disorder varies by the symmetry of the participating state. The key finding of this work are that (1) semiconductor barrier thinning with dopants is not robust to atomistic variation, (2) the addition of barrier lowering with interlayers provides the necessary contact resistivity reduction to meet targets for transistor scaling, and (3) disorder at metal-oxide interfaces does not account for the observed loss of magnetoresistance in half-metallic tunnel junctions.
MoS 2 is a material of interest for two-dimensional (2D) field effect transistors (FETs) 1-3, however contact resistance (R c ) remains a key limiting factor. Here we present a systematic study of ...contact resistance to MoS 2 using various metals with different deposition conditions, compared to detailed simulations. We find that decreasing the metal deposition pressure improves the metal-MoS2 interface and brings R c for Au contacts to <;1 kΩ-μm, which is lower than previous reports with Ni, Sc, or Au 1,4. Comparison to simulations suggest that while the contact resistivity is reasonably good (ρc ≈ 5·10 -7 Ω·cm 2 ), the lateral access resistance limits Rc in MoS 2 FETs. This study is crucial for scalability of MoS 2 devices, also suggesting methods to further improve Rc.
Spin-resolved conductivities in magnetic tunnel junctions are calculated using a semiempirical tight-binding model and non-equilibrium Green's functions. The performance of half-metallic electrodes ...is studied by comparing conventional Fe-MgO-Fe structures to Co 2 FeAl-MgO-Co 2 FeAl structures. The results show higher tunneling magnetoresistance and resistance-area product for Co 2 FeAl devices across a wide bias range.
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