This paper presents the test results of the second prototype of SAMPA, the ASIC designed for the upgrade of read-out front end electronics of the ALICE Time Projection Chamber (TPC) and Muon Chamber ...(MCH). SAMPA is made in a 130 nm CMOS technology with 1.25 V nominal voltage supply and provides 32 channels, with selectable input polarity, and three possible combinations of shaping time and sensitivity. Each channel consists of a Charge Sensitive Amplifier, a semi-Gaussian shaper and a 10-bit ADC; a Digital Signal Processor provides digital filtering and compression capability. In the second prototype run both full chip and single test blocks were fabricated, allowing block characterization and full system behaviour studies. Experimental results are here presented showing agreement with requirements for both the blocks and the full chip.
This paper presents the SAMPA, an ASIC designed for the upgrade of read-out front end electronics of the ALICE Time Projection Chamber (TPC) and Muon Chambers (MCH). SAMPA is made in a 130 nm CMOS ...technology with 1.25 V nominal voltage supply and includes 32 channels, with selectable input polarity, and five possible combinations of shaping time and sensitivity. Each channel comprises a Charge Sensitive Amplifier, a semi-Gaussian shaper and a 10-bit ADC, followed by a Digital Signal Processor. A prototype in a multi project run was submitted to evaluate the performance of each of these blocks. The experimental results of the tests on these building blocks are presented, showing a substantial agreement with requirements.
This paper presents the solution for optimization of the ALICE TPC readout for running at full energy in the Run2 period after 2014. For the data taking with heavy ion beams an event readout rate of ...400 Hz with a low dead time is envisaged for the ALICE central barrel detectors during these three years. A new component, the Readout Control Unit 2 (RCU2), is being designed to increase the present readout rate by a factor of up to 2.6. The immunity to radiation induced errors will also be significantly improved by the new design.
This paper presents the first performance results of the ALICE TPC Readout Control Unit 2 (RCU2). With the upgraded hardware typology and the new readout scheme in FPGA design, the RCU2 is designed ...to achieve twice the readout speed of the present Readout Control Unit. Design choices such as using the flash-based Microsemi Smartfusion2 FPGA and applying mitigation techniques in interfaces and FPGA design ensure a high degree of radiation tolerance. This paper presents the system level irradiation test results as well as the first commissioning results of the RCU2. Furthermore, it will be concluded with a discussion of the planned updates in firmware.
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