High-electric-field degradation phenomena are investigated in GaN-capped AlGaN/GaN HEMTs by comparing experimental data with numerical device simulations. Under power- and OFF-state conditions, 150-h ...DC stresses were carried out. Degradation effects characterizing both stress experiments were as follows: a drop in the dc drain current, the amplification of gate-lag effects, and a decrease in the reverse gate leakage current. Numerical simulations indicate that the simultaneous generation of surface (and/or barrier) and buffer traps can account for all of the aforementioned degradation modes. Experiments also showed that the power-state stress induced a drop in the transconductance at high gate-source voltages only, whereas the OFF-state stress led to a uniform transconductance drop over the entire gate-source-voltage range. This behavior can be reproduced by simulations provided that, under the power-state stress, traps are assumed to accumulate over a wide region extending laterally from the gate edge toward the drain contact, whereas, under the OFF-state stress, trap generation is supposed to take place in a narrower portion of the drain-access region close to the gate edge and to be accompanied by a significant degradation of the channel transport parameters.
Extracted interface trap densities (Dit) in the oxide III-V gate stacks vary strongly with the utilized measurement procedures and values of device parameters used in the extraction analysis. Such ...Dit dependency on both selected procedures and parameters compromises unambiguous extraction of energy distributions of defects affecting device characteristics. To overcome this uncertainty, we propose an extraction approach, which combines the essential features of the high-low method and Terman method, allowing us to self-consistently determine Dit distribution along with values of the critical device parameters, effective oxide thickness (EOT) and substrate doping density (Nd).
Abstract
Hydrogenated Amorphous Silicon (a-Si:H) is a well known material for its intrinsic radiation hardness and is primarily utilized in solar cells as well as for particle detection and ...dosimetry. Planar p-i-n diode detectors are fabricated entirely by means of intrinsic and doped PECVD of a mixture of Silane (SiH
4
) and molecular hydrogen. In order to develop 3D detector geometries using a-Si:H, two options for the junction fabrication have been considered: ion implantation and charge selective contacts through atomic layer deposition. In order to test the functionality of the charge selective contact electrodes, planar detectors have been fabricated utilizing this technique. In this paper, we provide a general overview of the 3D fabrication project followed by the results of leakage current measurements and X-ray dosimetric tests performed on planar diodes containing charge selective contacts to investigate the feasibility of the charge selective contact methodology for integration with the proposed 3D detector architectures.
The vertex detectors for the future hadronic colliders will operate under proton fluencies above 1016 p/cm2. Crystalline Silicon detector technology, up to now, has kept the pace of the increasing ...fluencies in the LHC era and it is still the prevalent vertex detector material for the present and for the immediate future. Looking ahead in time, an alternative solution for such a detector has to be found because for the future there is no guarantee that Crystalline Silicon will hold this challenge. For this reason the development of hydrogenated amorphous silicon vertex detectors based on 3D-technology have been proposed and the technological solutions in order to build these detectors are described in this paper.
Hydrogenated amorphous silicon (a-Si:H) has remarkable radiation resistance properties and can be deposited on a lot of different substrates. A-Si:H based particle detectors have been built since mid ...1980s as planar p-i-n or Schottky diode structures; the thickness of these detectors ranged from 1 to 50 μm. However MIP detection using planar structures has always been problematic due to the poor S/N ratio related to the high leakage current at high depletion voltage and the low charge collection efficiency. The usage of 3D detector architecture can be beneficial for the possibility to reduce inter-electrode distance and increase the thickness of the detector for larger charge generation compared to planar structures. Such a detector can be used for future hadron colliders for its radiation resistance and also for X-ray imaging. Furthermore the possibility of a-Si:H deposition on flexible materials (like kapton) can be exploited to build flexible and thin beam flux measurement detectors and x-ray dosimeters.
Particle detectors were made using semiconductor epitaxial 4H–SiC as the detection medium. The investigated detectors are formed by Schottky contact (Au) on the epitaxial layer and an ohmic contact ...on the back side of 4H–SiC substrates with different micropipe densities from CREE. For radiation hardness studies, the detectors have been irradiated with protons (
24
GeV/c
) at a fluence of about
10
14
cm
−2
and with electrons
(8.2
MeV)
and gamma-rays (
60
Co
source) at doses ranging from 0 to
40
Mrad
. We present experimental data on the charge collection properties by using 5.48, 4.14 and
2.00
MeV
α-particles impinging on the Schottky contact. Hundred percent charge collection efficiency (CCE) is demonstrated for reverse voltages higher than the one needed to have a depletion region equal to the α-particle projected range, even after the irradiation at the highest dose. By comparing measured CCE values with the outcomes of drift–diffusion simulations, values are inferred for the hole lifetime,
τ
p, within the neutral region of the charge carrier generation layer.
τ
p was found to decrease with increasing radiation levels, ranging from
300
ns
in non-irradiated detectors to
3
ns
in the most irradiated ones. The diffusion contribution of the minority charge carriers to CCE is pointed out.
In this work, current collapse effects in AlGaN/GaN HEMTs are investigated by means of measurements and two-dimensional physical simulations. According to pulsed measurements, the used devices ...exhibit a significant gate-lag and a less pronounced drain-lag ascribed to the presence of surface/barrier and buffer traps, respectively. As a matter of fact, two trap levels (0.45
eV and 0.78
eV) were extracted by trapping analysis based on isothermal current transient. On the other hand, 2D physical simulations suggest that the kink effect can be explained by electron trapping into barrier traps and a consequent electron emission after a certain electric-field is reached.
The aim of this paper is to achieve a correct description of the programming charge distribution in NROM memory devices. This is essential to prove device functionality and to extrapolate scaling ...limits of devices. For this purpose we employ an inverse modeling based methodology using measurements easily performed, such as subthreshold characteristics and threshold voltage measurements. We show a simple model of programming charge distribution that can be easily implemented in two-dimensional (2-D) TCAD simulations. Results show good agreement between measured and simulated currents under different bias conditions and for different programming levels.
A battery-powered, wireless Radon sensor has been designed and realized using a BJT, fabricated on a high-resistivity-silicon substrate, as a radiation detector. Radon daughters are electrostatically ...collected on the detector surface. Thanks to the BJT internal amplification, real-time α particle detection is possible using simple readout electronics, which records the particle arrival time and charge. Functional tests at known Radon concentrations, demonstrated a sensitivity up to 4.9cph/(100Bq/m3) and a count rate of 0.05cph at nominally-zero Radon concentration.
Traps are characterized in AlGaN–GaN HEMTs by means of DLTS techniques and the associated charge/discharge behavior is interpreted with the aid of numerical device simulations. Under specific bias ...conditions, buffer traps can produce “false” surface-trap signals, i.e. the same type of current-mode DLTS (I-DLTS) or ICTS signals that are generally attributed to surface traps. Clarifying this aspect is important for both reliability testing and device optimization, as it can lead to erroneous identification of the degradation mechanism, thus resulting in wrong correction actions on the technological process.
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