This paper reports on the latest advances and challenges of a 2D Fourier Transform Computational Accelerator using GHz Ultrasonics. Firstly, the accelerator architecture is presented in four parts: (1) a brief overview of the system architecture and the principles of Fourier Transform using ultrasonic waves; (2) CMOS circuit architecture of the transmitter and receiver IC; (3) MEMS transducer pixel design and post-CMOS integration; and (4) GHz acoustic meta-lens design. The following section discusses the latest advances in the sonic DAC and front-end receiver CMOS circuit testing, CMOS-MEMS integration, fabrication of GHz flat acoustic meta-lens, and studies of a novel low-temperature heterogeneous integration process suitable for GHz acoustic transmission.