The eight stacked Ge 0.75 Si 0.25 nanosheets, the seven stacked Ge 0.95 Si 0.05 nanowires, and the six stacked Ge 0.95 Si 0.05 nanowires without parasitic channels are demonstrated. These highly stacked channels are made from 18 epilayers consisting of a Ge buffer, nine heavily P-doped Ge sacrificial layers, and eight GeSi channel layers with the low growth temperature (350 °C and 375 °C) to ensure the entire epilayers metastable without dislocations in the channels. The isotropic wet etching by H 2 O 2 and NH 4 OH + H 2 O 2 is used for the channel release and the removal of the parasitic channels, respectively. The delicate interplay between epilayer design and wet etching is implemented to fabricate the highly stacked GeSi channels. High inter-channel uniformity of the eight stacked Ge 0.75 Si 0.25 nanosheets is obtained due to the superior etching selectivity. High <inline-formula> <tex-math notation="LaTeX">{I}_{\mathrm{\scriptscriptstyle ON}} </tex-math></inline-formula> per stack and per footprint of the seven stacked Ge 0.95 Si 0.05 nanowires and the six stacked Ge 0.95 Si 0.05 nanowires without parasitic channels are achieved due to the high mobility <inline-formula> <tex-math notation="LaTeX">{L}_{4} </tex-math></inline-formula> valleys and nanowire conduction. The reduced subthreshold slope (SS) and improved <inline-formula> <tex-math notation="LaTeX">{I}_{\mathrm{\scriptscriptstyle ON}} / {I}_{\mathrm{\scriptscriptstyle OFF}} </tex-math></inline-formula> are obtained by parasitic channel removal. The record <inline-formula> <tex-math notation="LaTeX">{I}_{\mathrm{\scriptscriptstyle ON}} </tex-math></inline-formula> of <inline-formula> <tex-math notation="LaTeX">120~\boldsymbol \mu \text{A} </tex-math></inline-formula> per stack (<inline-formula> <tex-math notation="LaTeX">4600~\boldsymbol \mu \text{A} / \boldsymbol \mu \text{m} </tex-math></inline-formula> per channel footprint) at <inline-formula> <tex-math notation="LaTeX">{V}_{\mathrm{\scriptscriptstyle OV}} = {V}_{\mathrm{\scriptscriptstyle DS}} = 0.5 </tex-math></inline-formula> V is reached among reported Ge/GeSi 3-D nFETs.