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Katz, A.; Vainstein, C.; Shoham, A.; Blank, T.; Leitner, T.; Fenigstein, A.; Birk, Y.; Nemirovsky, Y.
IEEE transactions on electron devices, 10/2018, Letnik: 65, Številka: 10Journal Article
We present the architecture and design of a CMOS single-photon avalanche diode (SPAD) pixel that was selected to be the basis for a gun muzzle flash detection camera. The SPAD sensor and auxiliary circuitry are fabricated in a standard <inline-formula> <tex-math notation="LaTeX">0.18-\mu \text{m} </tex-math></inline-formula> CMOS image sensor technology. The pixel integrates a <inline-formula> <tex-math notation="LaTeX">25-\mu \text{m} </tex-math></inline-formula> pitch SPAD, a variable-load quenching circuit implemented with a 1.8-V pMOS, and digital processing electronics providing an 8-bit output bus. The SPAD is low noise (around 100-Hz dark count rate at 1.8-V excess voltage) and has a real peak photon detection efficiency (not averaged on pixel pitch) of 9.2% at 450 nm (1.8-V excess voltage). The pixel delivers intensity information through photon counting, up to 256 counts per frame with down to <inline-formula> <tex-math notation="LaTeX">5-\mu \text{s} </tex-math></inline-formula> integration time for the full dynamic range. The pixel memories enable parallel processing and global-shutter readout, preventing motion artifacts and partial exposure effects. The pixel can acquire very fast optical events at a high frame-rate (up to 200 kilo frames/s) and at a single-photon level. The pixel has an 8-bit parallel output bus.
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JCR | SNIP | JCR | SNIP | JCR | SNIP | JCR | SNIP |
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