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  • Enabling Scalable Disintegr...
    Fotouhi, Pouya; Werner, Sebastian; Proietti, Roberto; Xiao, Xian; Ben Yoo, S. J.

    Journal of optical communications and networking, 07/2019, Letnik: 11, Številka: 7
    Journal Article

    2.5D integrated systems exploiting electronic interposers to tightly integrate multiple processor dies into the same package suffer from significant performance degradation caused by the large latency overheads of their die-to-die multihop electrical interconnection networks. Silicon-photonic interposers with wavelength-routed interconnects can overcome this issue by enabling directly connected, scalable topologies while exhibiting low-energy optical communication even at large distances. This paper studies the use of an arrayed waveguide grating router (AWGR) as a scalable, low-latency silicon-photonic interconnection fabric for computing systems with up to 256 cores. Our results indicate that AWGRs could be a key enabler for large-scale interposer systems, offering an average performance speed-up of at least 1.25× with 1.32× lower power for 256 cores compared to state-of-the-art electrical networks, while offering a more compact solution compared to alternative photonic interconnects.