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Weldon, J A; Rudell, J C; Lin, L; Narayanaswami, R S; Otsuka, M; Dedieu, S; Tee, L; Tsai, K-C; Lee, C-W; Gray, P R
Digest of technical papers - IEEE International Solid-State Circuits Conference, 01/2001Journal Article
A 1.75 GHz highly-integrated narrow-band complementary metal oxide semiconductors (CMOS) transmitter was proposed with harmonic-rejection mixers. The proposed architecture consists of two baseband signal paths, an image/harmonic rejection upconversion mixer, a channel-selection sysnthesiser, a fixed-frequency Rf synthesizer and two quadrature generation circuits. A prototype device based on the harmonic-rejection CMOS integrated circuit concept was fabricated in a 0.35 mu m, double-poly, 5-layer metal CMOS process. A breakdown of the power consumption and a summary of test results were described.
