The advantage of using extremely-thin body (ETB, Tsi=3nm) device has been demonstrated in a 3D NAND Flash test chip. Net P/E memory window gain of >1.3V is observed for devices using ETB poly-Si. This substantial gain can be explained by the "quantum confinement" that raises effective Si bandgap and in turn reduces the tunneling barrier height. Simulation model has been validated and it shows equivalent barrier height reduction of ~0.16eV and 0.07eV for electron and hole, respectively for Tsi=3nm. Meanwhile, the extremely-thin body poly silicon channel can improve S.S. to nearly 250mV/dec, which is close to bulk 2D Flash devices. However, the Idsat is degraded to only 160nA for Tsi=3nm, which is attributed to the larger effective mass or higher contact resistance. The degraded Idsat can be accommodated by lower Isense<30nA for page buffer circuit tuning. Random telegraph noise (RTN) is significantly reduced by extremely-thin body, and it shows tighter program-verify (PV) distribution in the MLC/TLC operation.