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Chung, Yao-An; Yang, Zusing; Chiu, Yuan-Chieh; Hong, Shih-Ping; Lee, Hong-Ji; Lian, Nan-Tzu; Yang, Tahone; Chen, Kuang-Chao; Lu, Chih-Yuan
2016 27th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC), 05/2016Conference Proceeding, Journal Article
A novel three-dimensional (3D) NAND structure containing both vertical gate (VG) framework and gate-all-around (GAA) cell structure is innovated and demonstrated. It is fabricated on alternating layers of silicon dioxide (OX) and polysilicon (PL) by using 43nm technology. To our knowledge, one of the major advantages of the novel structure is the smaller cell unit footprint than vertical channel (VC) designs; it also provides storage density comparable with VC by the use of much less cell stacks. Furthermore, GAA cell structure is expected to contain better program/erase characteristics than VG due to curvature effect. In this paper, we discuss some of the most critical processes for fabrication of such 3D NAND flash with VG-GAA designs.
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JCR | SNIP | JCR | SNIP | JCR | SNIP | JCR | SNIP |
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Vir: Osebne bibliografije
in: SICRIS
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