E-viri
Recenzirano
-
Karimi-Ghartemani, M.; Khajehoddin, S. A.; Jain, P. K.; Bakhshai, A.; Mojiri, M.
IEEE transactions on power electronics, 2012-Jan., 2012, 2012-01-00, 20120101, Letnik: 27, Številka: 1Journal Article
This paper presents a method for addressing the dc component in the input signal of the phase-locked loop (PLL) and notch filter algorithms applied to filtering and synchronization applications. The dc component may be intrinsically present in the input signal or may be generated due to temporary system faults or due to the structure and limitations of the measurement/conversion processes. Such a component creates low-frequency oscillations in the loop that cannot be removed using filters because such filters will significantly degrade the dynamic response of the system. The proposed method is based on adding a new loop inside the PLL structure. It is structurally simple and, unlike an existing method discussed in this paper, does not compromise the high-frequency filtering level of the concerned algorithm. The method is formulated for three-phase and single-phase systems, its design aspects are discussed, and simulations/experimental results are presented.
![loading ... loading ...](themes/default/img/ajax-loading.gif)
Vnos na polico
Trajna povezava
- URL:
Faktor vpliva
Dostop do baze podatkov JCR je dovoljen samo uporabnikom iz Slovenije. Vaš trenutni IP-naslov ni na seznamu dovoljenih za dostop, zato je potrebna avtentikacija z ustreznim računom AAI.
Leto | Faktor vpliva | Izdaja | Kategorija | Razvrstitev | ||||
---|---|---|---|---|---|---|---|---|
JCR | SNIP | JCR | SNIP | JCR | SNIP | JCR | SNIP |
Baze podatkov, v katerih je revija indeksirana
Ime baze podatkov | Področje | Leto |
---|
Povezave do osebnih bibliografij avtorjev | Povezave do podatkov o raziskovalcih v sistemu SICRIS |
---|
Vir: Osebne bibliografije
in: SICRIS
To gradivo vam je dostopno v celotnem besedilu. Če kljub temu želite naročiti gradivo, kliknite gumb Nadaljuj.