The Yet Another Rapid Readout (YARR) system is a DAQ system designed for pixel readout chips including the current generation ATLAS FE-I4 chip and the next generation RD53A chip, which is part of the development of new Pixel detector technology to be implemented in High-Luminosity Large Hadron Collider experiments. YARR utilises a PCI-e FPGA card which acts as a simple gateway to pipe all data from pixel readout chips via the high speed PCI-e connection into the host system's memory. All data processing is done on a software level in the host CPU(s), utilising a data-driven, multi-threaded, parallel processing paradigm. YARR has recently been upgraded to interface with software emulators of pixel readout chips. These emulators offer many benefits: quick development of DAQ software; expansion of the developer base to users without access to readout hardware; preparation of DAQ software for upcoming readout chips, such as RD53A; implementation of Continuous Integration and unit tests to ensure code quality and maintainability. The design and capabilities of the FE-I4 and RD53A software emulators will be presented.