The discovery of simple chaotic systems with complex dynamics has always been an interesting research work. This brief aims to construct an extremely simple chaotic system with infinitely many ...coexisting chaotic attractors. The system consists of five terms with two nonlinearities, and has an infinite number of unstable equilibria owing to its sinusoidal nonlinearity. The most prominent feature of the system is that it coexists infinitely many chaotic attractors for different initial values and fixed system parameters. To our best knowledge, there is no 3-D system with such a simple mathematical model can produce infinitely many coexisting chaotic attractors. The phenomenon of coexisting attractors of the new system is numerically investigated. The circuit and microcontroller-based implementation of the system are presented as well.
Chaotic systems with memristor are favored by academia because of diversity of dynamics. This brief reports a novel two-memristor-based 4D chaotic system. Numerical simulation shows that the system ...can yield infinite coexisting attractors. The generation mode of infinite coexisting attractors is investigated as well. Finally, the circuit and microcontroller-based implementation of two-memristor-based chaotic system are also given, corresponding experimental results fit well with numerical simulations.
•A new chaotic system with infinitely many coexisting attractors is presented. The dynamic behaviors of the new system are studied. The abundant coexisting attractors of the system are presented.•The ...electronic circuit and microcontroller-based implementation of the new system is studied. The consistence between the circuit outputs and the simulation results physically illustrates the existence of the system.•The synchronization problem of the new system is studied by using the sliding mode control method and the corresponding synchronization conditions are established.
This paper reports a new chaotic system generated from the simplest memristor chaotic circuit by introducing a simple nonlinear feedback control input. The principal feature of the new system is that it has infinitely many equilibria and abundant coexisting attractors. The dynamic evolution of the system with respect to parameters and initial conditions is given to illustrate the existence of chaos and coexisting attractors. The circuit implementation is done for demonstrating the physical existence of the system. A microcontroller on Arduino Mega 2650 board is used to realize the system. Also the synchronization problem of the system is analyzed with the establishment of synchronization conditions based on the sliding mode control.
Abstract The programming of microcontrollers is essential for their correct operation, high computational efficiency, low-power solutions, and it is also key to get the most out of their capabilities ...with the hardware features that each of the microcontroller families has. There are different programming languages that can be used in microcontrollers, in this work we will focus on C and Assembler. C is one of the most widely used due to its efficiency and its ability to control the hardware directly. Assembly is a low-level language that allows more control over the instructions executed in the microcontroller, two songs have been implemented in assembler and C languages and the resources used for their execution on a Microchip PIC16F877 have been analyzed. The research results allow the developer to obtain results for a selection of the optimal hardware platform as well as the programming language according to the required memory utilization. Coding performed in MPLAB software with the asm and XC8 compilers, indicate that the C-code programs cover a larger amount of memory close to 4 times greater or higher.
At present, a single-chip microcomputer without an operating system is used for data exchange with single storage media and the transmission speed is limited. In this paper, FATFS module is ...transplanted on a single-chip microcomputer based on an ARM Cortex-M7 micro-controller. The data acquisition and storage are carried out in parallel with multiple storage media such as SD, the NAND FLASH and the U disk on a high-performance STM32H7 platform. The read-write speed is tested finally. The results show that the file management function can be completed well and the operation is stable.
In general, baby nurses in the hospital, if the baby cries and bedwetting can not immediately find out because there is no completeness or tool to inform / monitor the baby's condition by using ...several indicators. Therefore, this article discusses the design of automatic baby box device. In the planning and making of paper modules, the writer has problem boundaries, namely planning and making baby boxes equipped with bedwetting sensor, crying sensor accompanied by musical rhythm
Field data collectors are widely used in industrial control and information monitoring. According to the design requirements of micropower consumption and reliability, combined with MSP430 ...microcontroller, this paper expounds the design scheme of a new type of micropower field data collector, and discusses the overall design of the system and the implementation method of main functional units.
Data Parallel C++ Reinders, James; Ashbaugh, Ben; Brodman, James ...
2023.
eBook
This open access book enables C++ programmers to be at the forefront of this exciting and important development that is helping to push computing to new levels. --
A 40-mA buck regulator operating in the inherently stable Discontinuous Conduction Mode (DCM) for the entire load range is presented. A pulse frequency modulation control scheme is implemented using ...a proposed hysteretic-assisted adaptive minimum-on-time controller to automatically adapt the regulator to a wide range of operating scenarios in terms of input, output, and passive component values while ensuring compensationless DCM operation with minimized inductor peak current. Thus, compact silicon area, low quiescent current, high efficiency, and robust performance across all possible scenarios can be achieved without any calibration. Moreover, power gating is employed in the analog circuits of the proposed controller to further improve efficiency at sub-mA loads. The regulator is integrated within a low-power microcontroller in 90-nm CMOS to power its digital core while allowing maximum flexibility in the powering options of the microcontroller and the choice of the passive components. It occupies 0.1 mm 2 and achieves 92% peak efficiency, and 78.5% and 86% efficiency at 200-μA and 40-mA loads, respectively. It handles an input in the range of 1.8-4.2 V, an output in the range of 0.9-1.4 V, an inductor in the range of 4.7-10 μH, and an output capacitor in the range of 2.2-10 μF without any calibration or reoptimization.
Binary neural networks (BNNs) are promising to deliver accuracy comparable to conventional deep neural networks at a fraction of the cost in terms of memory and energy. In this paper, we introduce ...the XNOR neural engine (XNE), a fully digital configurable hardware accelerator IP for BNNs, integrated within a microcontroller unit (MCU) equipped with an autonomous I/O subsystem and hybrid SRAM/standard cell memory. The XNE is able to fully compute convolutional and dense layers in autonomy or in cooperation with the core in the MCU to realize more complex behaviors. We show post-synthesis results in 65- and 22-nm technology for the XNE IP and post-layout results in 22 nm for the full MCU indicating that this system can drop the energy cost per binary operation to 21.6 fJ per operation at 0.4 V, and at the same time is flexible and performant enough to execute state-of-the-art BNN topologies such as ResNet-34 in less than 2.2 mJ per frame at 8.9 frames/s.
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