The MAPS foil Beolé, S.; Carnesecchi, F.; Contin, G. ...
Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment,
01/2023, Letnik:
1046, Številka:
C
Journal Article
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We present a method of embedding a Monolithic Active Pixel Sensor (MAPS) into a flexible printed circuit board (FPC) and its interconnection by means of through-hole copper plating. The resulting ...assembly, baptised “MAPS foil”, is a flexible, light, protected, and fully integrated detector module. By using widely available printed circuit board manufacturing techniques, the production of these devices can be scaled easily in size and volume, making it a compelling candidate for future large-scale applications.
A first series of prototypes that embed the ALPIDE chip has been produced, functionally tested, and shown to be working.
Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast ...readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10MHz with a matrix height of 15mm. The energy consumed to read out one pixel is around 72pJ. A scheme to boost the readout speed to 40MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented.
A novel source–drain follower for monolithic active pixel sensors Gao, C.; Aglieri, G.; Hillemanns, H. ...
Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment,
09/2016, Letnik:
831
Journal Article
Recenzirano
Monolithic active pixel sensors (MAPS) receive interest in tracking applications in high energy physics as they integrate sensor and readout electronics in one silicon die with potential for lower ...material budget and cost, and better performance. Source followers (SFs) are widely used for MAPS readout: they increase charge conversion gain 1/Ceff or decrease the effective sensing node capacitance Ceff because the follower action compensates part of the input capacitance. Charge conversion gain is critical for analog power consumption and therefore for material budget in tracking applications, and also has direct system impact. This paper presents a novel source–drain follower (SDF), where both source and drain follow the gate potential improving charge conversion gain. For the inner tracking system (ITS) upgrade of the ALICE experiment at CERN, low material budget is a primary requirement. The SDF circuit was studied as part of the effort to optimize the effective capacitance of the sensing node. The collection electrode, input transistor and routing metal all contribute to Ceff. Reverse sensor bias reduces the collection electrode capacitance. The novel SDF circuit eliminates the contribution of the input transistor to Ceff, reduces the routing contribution if additional shielding is introduced, provides a way to estimate the capacitance of the sensor itself, and has a voltage gain closer to unity than the standard SF. The SDF circuit has a somewhat larger area with a somewhat smaller bandwidth, but this is acceptable in most cases.
A test chip, manufactured in a 180nm CMOS image sensor process, implements small prototype pixel matrices in different flavors to compare the standard SF to the novel SF and to the novel SF with additional shielding. The effective sensing node capacitance was measured using a 55Fe source. Increasing reverse substrate bias from −1V to −6V reduces Ceff by 38% and the equivalent noise charge (ENC) by 22% for the standard SF. The SDF provides a further 9% improvement for Ceff and 25% for ENC. The SDF circuit with additional shielding provides 18% improvement for Ceff, and combined with −6V reverse bias yields almost a factor 2.
•A source–drain follower (SDF) for monolithic active pixel sensors is proposed.•The SDF reduces the input capacitance increasing the charge conversion gain.•The SDF can provide improved noise-power performance.•The SDF with shielding provides further improvement.•The SDF with shielding provides a way to measure the sensor capacitance.
Within the R&D activities for the upgrade of the ALICE Inner Tracking System (ITS), Monolithic Active Pixel Sensors (MAPS) are being developed and studied, due to their lower material budget (~0.3%X0 ...in total for each inner layer) and higher granularity (~20μm×20μm pixels) with respect to the present pixel detector. This paper presents the design and characterization results of the Explorer0 chip, manufactured in the TowerJazz 180nm CMOS Imaging Sensor process, based on a wafer with high-resistivity (ρ>1kΩcm) and 18μm thick epitaxial layer. The chip is organized in two sub-matrices with different pixel pitches (20μm and 30μm), each of them containing several pixel designs. The collection electrode size and shape, as well as the distance between the electrode and the surrounding electronics, are varied; the chip also offers the possibility to decouple the charge integration time from the readout time, and to change the sensor bias. The charge collection properties of the different pixel variants implemented in Explorer0 have been studied using a 55Fe X-ray source and 1–5GeV/c electrons and positrons. The sensor capacitance has been estimated, and the effect of the sensor bias has also been examined in detail. A second version of the Explorer0 chip (called Explorer1) has been submitted for production in March 2013, together with a novel circuit with in-pixel discrimination and a sparsified readout. Results from these submissions are also presented.