This Special Issue of the IEEE JOURNAL OF SOLID-STATE CIRCUITS features expanded versions of key articles presented at the 2020 Custom Integrated Circuits Conference (CICC), one of IEEE's first ...conferences to go fully virtual due to the corona virus pandemic, from March 22 to March 25, 2020. Originally planned to be held at Hyatt Boston Harbor, Boston, MA, USA, growing concerns related to COVID-19 and the impact on the community's ability to travel to the conference lead the conference organization to make the tough decision in January 2020 to go for a fully virtual format. The dates and schedule of the conference remained unchanged.
A single-trim, highly accurate Colpitts-based frequency reference is presented. Our analysis shows that the Colpitts-topology outperforms the cross-coupled LC -topology in terms of temperature ...stability. Measurements on prototypes in a 0.13-<inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula> high-voltage CMOS silicon on insulator (SOI) process were carried out from −50 °C to 170 °C. Based on sample-specific single room temperature trim and batch calibration, our frequency reference achieves an accuracy of ±120 ppm for 16 samples from a single wafer utilized for extracting the batch-calibration polynomial and ±300 ppm for 48 samples across three wafers from the same batch. This is a 4<inline-formula> <tex-math notation="LaTeX">\times </tex-math></inline-formula> improvement over related single-trim state-of-the-art solutions. Frequency drift due to aging, tested after a six-day 175 °C storage, is below 100 ppm. The oscillator core dissipates 3.5 mW from a 2.5-V supply and has 220-ppm/V supply sensitivity without supply regulation.
This Special Section of the IEEE Journal of Solid-State Circuits (JSSC) features expanded versions of key articles presented at the 2021 Custom Integrated Circuits Conference (CICC), which for the ...second time in a row was fully virtual due to the coronavirus pandemic. Originally planned to be held in Austin, TX, USA, the unpredictability of COVID-19 quickly lead the conference organization to decide to (again) go for a fully virtual format from April 25 to 30, 2021. With all the experience of the previous year, where CICC was the first IEEE Solid-State Circuits Society (SSCS) conference to go virtual, and that of subsequent SSCS and other conferences, it was comparatively smooth sailing.
Hard-switched mixers have attractive linearity and noise properties, but are plagued by spurious responses due to the harmonic content of square-wave local oscillator (LO) signals. Harmonic rejection ...mixers (HRMs) reject (some of) these responses and can be constructed combining polyphase mixing and amplitude weighting. This brief presents a generalized model for the analysis of the harmonic rejection (HR) of such HRMs, based on circular convolution. We show that the effective LO signal can be modeled as a periodic Dirac impulse filtered by a time-discrete filter. For a multi-stage HR system, this filter consists of multiple stages as well, and the coefficients of each stage can be found simply by inspection. The total HR is shown to be the sum (in dB) of the rejection of the individual filtering stages, highly simplifying analysis and design of HRMs.
In this paper, we propose and analyze a pulse-output digital-to-frequency converter (DFC) generating square waves, which uses a digital-to-time converter (DTC) to correct the spurious tones (spurs) ...in the output spectrum. We focus on high-level architectural potential, discuss the design features of a DTC suitable for the proposed system, and explore possibilities and limits of this approach in terms of cleanness of the output spectrum. The behavioral model simulations confirm the theoretical analysis presented. Besides an analytical description of the output spurs, we derive a closed-form estimate of the worst-case spur, which leads to a simple design equation. This is useful to determine the DTC requirements number of bits and integral non-linearity (INL), given a certain spurious-free dynamic range (SFDR) target. We show that the maximum spur strength (in dBc) depends exclusively on the ratio between the output frequency and the clock frequency and the DTC features (number of bits, INL, and other impairments) and increases with the ratio by 6 dB/octave.
We present a general analytical solution for the active input impedances of a given <inline-formula> <tex-math notation="LaTeX">N </tex-math></inline-formula>-port impedance network as a function of ...the loading of its ports by either active or passive devices. To demonstrate the simplicity and ease of use of our approach, we derive the input impedance equations of a conventional balanced power amplifier (BPA) and the load-modulated balanced amplifier (LMBA) and the effects of mismatching the output load. We next focus on the properties of the hybrid coupler and present a general heuristic of categorization, as well as the identification of a missing topology. This missing topology is what we refer to as the load-modulated linearizer (LML), which utilizes active load-modulation to absorb individual out-of-band (OOB) amplitude to amplitude (AM/AM) intermodulation distortion (IMD) components at the output of a power amplifier (PA). When properly designed, the LML requires only slightly more additional power than the IMD power it absorbs, making it very efficient. It retains the power conservation properties of the LMBA and achieves better linearization than an equivalent digital predistortion (DPD) system, at a very low power and complexity penalty. As the LML operates at the output of the nonlinear PA, it can independently target individual IMD tones without affecting the rest.
This article presents a multi-receiver cross-correlation technique for (B)FSK receivers, targeting wireless sensor network applications. Here, multiple receiver outputs are pair-wise cross-correlated ...and the correlated output samples are averaged to lower the noise floor at the receiver output. Compared to a two-receiver cross-correlation, multi-receiver cross-correlation generates more cross-correlated output samples in a given time. Hence it requires a shorter measurement time for a desired noise floor reduction and facilitates a higher data rate for (B)FSK operation. Compared to a single receiver, it improves the linearity and the harmonic interferer tolerance using passive splitters and different LO frequencies in the receiver paths respectively. These theoretical insights are verified with measurements for the first time using a 2- and 3-receiver cross-correlation in a BFSK receiver. Operating at 1GHz and with a data rate of 200kbps, the demonstrator, using sub-mW mixer-first receiver front-ends for power efficiency, achieves −102dBm sensitivity and >40 dB rejection for both narrow and wideband harmonic interferers without any RF filters.
Voice Activity Detection (VAD) is a technique used to identify the presence of human voice in an audio signal. It is implemented as an always-on component in most speech processing applications. As ...speech is absent most of the time, this component typically dominates the overall average power consumption of the system (excluding microphone). The widespread usage in speech applications and the need for ultra low power VAD have led to a plethora of algorithms and implementations in the hardware domain, necessitating a comprehensive study and analysis to understand (real-time) requirements, different design parameters, testing strategies, but also to identify design trends, challenges and guidelines for future implementations and testing of VAD devices. A scoping review was conducted to identify the articles for hardware implementations of VAD from January 2010 -December 2021, the results of which are presented in this article. The results highlight a big design space being used for VAD along with a lack of standard testing methodology and usage of application-dependent performance metrics. An increased usage of filter-based feature extractors along with neural-network-based classifiers is observed. Due to lack of standardisation, no other trends can be established from the results. A set of rules and guidelines are therefore provided to facilitate the future development and benchmarking of VADs.
A novel algorithm is presented that can resolve frequency ambiguity that arises from sampling a set of signals spanning more than a single Nyquist zone. The method uses two samplers, each sampling ...the same input signal with different (non-integer multiple) sampling rates. The algorithm is able to resolve frequency ambiguity and reconstruct signals with an orthogonal frequency basis spanning multiple Nyquist zones, provided that the aggregate information-bearing bandwidth of the signals is less than half the cumulative data converter sampling rates. This manuscript describes the theoretical background for the algorithm and validates it through measurements performed on a test-board comprising of two 10 bit analog-to-digital converters clocked at two different (non-integer multiple) sample rates. Measurements show that even in the presence of aliasing, an orthogonal signal spanning multiple Nyquist zones can be fully reconstructed.
An integrated spectrum analyzer is useful for built-in self-test purposes, software-defined radios, or dynamic spectrum access in cognitive radio. The analog/RF performance is impaired by a number of ...factors, including thermal noise, phase noise, and nonlinearity. In this paper, we present an integrated circuit with two integrated RF-frontends, of which the outputs are crosscorrelated in digital baseband. We show by theory and measurements that the above-mentioned impairments are mitigated by this technique. The presented 65-nm CMOS prototype operates at 1.2 V, and obtains a noise floor below -169 dBm/Hz, an IIP 3 of +25 dBm, and more than 20 dB of phase-noise reduction. In a special high-impedance mode, an even lower noise floor below -172 dBm/Hz is obtained.
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