•In this paper, a generalized method for designing of delay timers is introduced based on a new concept named “penalty”.•It provides more flexibility in alarm design.•The paper formulated indices, ...FAR and MAR for various penalties. Also, to calculate AAD, another index named MTTA is introduced.•In the sense of performance, it has been proved that indices FAR, MAR and AAD in penalty scenario give better results compared with those of the reset scenarios with 2≤i<n-1.
Alarm systems indicate abnormal conditions of the underlined plant equipment enabling operators to take corrective actions, and bring the equipment back to its normal condition. This paper presents a new approach for designing a generalized delay timer based on the penalty scenario and Markov chain schemes. The penalty approach is an extension for the well-known “n-sample on/off delay timer” approach in designing alarm systems. Three performance indices named, False Alarm Rate (FAR), Missed Alarm Rate (MAR) and Average Alarm Delay (AAD) are derived for the proposed penalty approach using Markov theory. Also, a new index named “Mean Time to Alarm (MTTA)” is introduced to analyze the underline alarm system, and to compute AAD. Finally, the effectiveness of the proposed method is investigated and compared with that of the other methods through a case study.
Sensors fabricated from high resistivity, float zone, silicon material have been the basis of vertex detectors and trackers for the last 30 years. The areas of these devices have increased from a few ...square cm to \(\> 200\ m^2\) for the existing CMS tracker. High Luminosity Large Hadron Collider (HL-LHC), CMS and ATLAS tracker upgrades will each require more than \(200\ m^2\) of silicon and the CMS High Granularity Calorimeter (HGCAL) will require more than \(600\ m^2\). The cost and complexity of assembly of these devices is related to the area of each module, which in turn is set by the size of the silicon sensors. In addition to large area, the devices must be radiation hard, which requires the use of sensors thinned to 200 microns or less. The combination of wafer thinning and large wafer diameter is a significant technical challenge, and is the subject of this work. We describe work on development of thin sensors on \(200 mm\) wafers using wafer bonding technology. Results of development runs with float zone, Silicon-on-Insulator and Silicon-Silicon bonded wafer technologies are reported.
The replacement of the existing endcap calorimeter in the Compact Muon Solenoid (CMS) detector for the high-luminosity LHC (HL-LHC), scheduled for 2027, will be a high granularity calorimeter. It ...will provide detailed position, energy, and timing information on electromagnetic and hadronic showers in the immense pileup of the HL-LHC. The High Granularity Calorimeter (HGCAL) will use 120-, 200-, and 300-\(\mu\textrm{m}\) thick silicon (Si) pad sensors as the main active material and will sustain 1-MeV neutron equivalent fluences up to about \(10^{16}~\textrm{n}_\textrm{eq}\textrm{cm}^{-2}\). In order to address the performance degradation of the Si detectors caused by the intense radiation environment, irradiation campaigns of test diode samples from 8-inch and 6-inch wafers were performed in two reactors. Characterization of the electrical and charge collection properties after irradiation involved both bulk polarities for the three sensor thicknesses. Since the Si sensors will be operated at -30 \(^\circ\)C to reduce increasing bulk leakage current with fluence, the charge collection investigation of 30 irradiated samples was carried out with the infrared-TCT setup at -30 \(^\circ\)C. TCAD simulation results at the lower fluences are in close agreement with the experimental results and provide predictions of sensor performance for the lower fluence regions not covered by the experimental study. All investigated sensors display 60\(\%\) or higher charge collection efficiency at their respective highest lifetime fluences when operated at 800 V, and display above 90\(\%\) at the lowest fluence, at 600 V. The collected charge close to the fluence of \(10^{16}~\textrm{n}_\textrm{eq}\textrm{cm}^{-2}\) exceeds 1 fC at voltages beyond 800 V.
As part of its HL-LHC upgrade program, the CMS Collaboration is developing a High Granularity Calorimeter (CE) to replace the existing endcap calorimeters. The CE is a sampling calorimeter with ...unprecedented transverse and longitudinal readout for both electromagnetic (CE-E) and hadronic (CE-H) compartments. The calorimeter will be built with \(\sim\)30,000 hexagonal silicon modules. Prototype modules have been constructed with 6-inch hexagonal silicon sensors with cell areas of 1.1~\(cm^2\), and the SKIROC2-CMS readout ASIC. Beam tests of different sampling configurations were conducted with the prototype modules at DESY and CERN in 2017 and 2018. This paper describes the construction and commissioning of the CE calorimeter prototype, the silicon modules used in the construction, their basic performance, and the methods used for their calibration.
The CMS experiment at the CERN LHC will be upgraded to accommodate the 5-fold increase in the instantaneous luminosity expected at the High-Luminosity LHC (HL-LHC). Concomitant with this increase ...will be an increase in the number of interactions in each bunch crossing and a significant increase in the total ionising dose and fluence. One part of this upgrade is the replacement of the current endcap calorimeters with a high granularity sampling calorimeter equipped with silicon sensors, designed to manage the high collision rates. As part of the development of this calorimeter, a series of beam tests have been conducted with different sampling configurations using prototype segmented silicon detectors. In the most recent of these tests, conducted in late 2018 at the CERN SPS, the performance of a prototype calorimeter equipped with \({\approx}12,000\rm{~channels}\) of silicon sensors was studied with beams of high-energy electrons, pions and muons. This paper describes the custom-built scalable data acquisition system that was built with readily available FPGA mezzanines and low-cost Raspberry PI computers.
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