A new ATLAS pixel front-end IC for upgraded LHC luminosity Barbero, M.; Arutinov, D.; Beccherle, R. ...
Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment,
06/2009, Letnik:
604, Številka:
1
Journal Article
Recenzirano
A new pixel Front-End (FE) IC is being developed in a 130
nm technology for use in the upgraded ATLAS pixel detector. The new pixel FE will be made of smaller pixels (50×250
μm vs. 50×400
μm for the ...present FE, FE-I3), a much improved active area over inactive area ratio, and a new analog pixel chain tuned for low power and new detector input capacitance. The higher luminosity for which this IC is tuned implies a complete redefinition of the digital architecture logic, which will not be based on End-of-Column data buffering but on local pixel logic and local pixel data storage. An overview of the new FE is given with particular emphasis on the new digital logic architecture and possible architecture variations.
A new pixel front-end integrated circuit is being developed in a 130 nm technology for use in the foreseen b-layer upgrade of the ATLAS pixel detector. Development of this chip is considered as an ...intermediate step towards super-LHC upgrade, and also allows having a smaller radius insertable pixel layer. The higher luminosity for which this chip is tuned implies a complete redefinition of the digital architecture logic with respect to the current ATLAS pixel front-end. The new digital architecture logic is not based on a transfer of all pixel hits to the periphery of the chip, but on local pixel logic, local pixel data storage, and a new mechanism to drain triggered hits from the double-column. An overview of the new chip will be given with particular emphasis on the new digital logic architecture and possible variations. The new interface needed to configure and operate the chip will also be described.
The FE-I4 pixel readout integrated circuit Garcia-Sciveres, M.; Arutinov, D.; Barbero, M. ...
Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment,
04/2011, Letnik:
636, Številka:
1
Journal Article, Conference Proceeding
Recenzirano
Odprti dostop
A new pixel readout integrated circuit denominated FE-I4 is being designed to meet the requirements of ATLAS experiment upgrades. It will be the largest readout IC produced to date for particle ...physics applications, filling the maximum allowed reticle area. This will significantly reduce the cost of future hybrid pixel detectors. In addition, FE-I4 will have smaller pixels and higher rate capability than the present generation of LHC pixel detectors. Design features are described along with simulation and test results, including low power and high rate readout architecture, mixed signal design strategy, and yield hardening.
First performance measurement results of a UHF-MRI compatible BrainPET insert for multimodal and multiparametric neuroscientific imaging applications have been obtained. The BrainPET-7T Insert was ...built for a human 7T MRI scanner from Siemens (MAGNETOM Terra) and comprises a total of 8 UHF-MR compatible PET modules 1. The inner diameter of the BrainPET-7T insert and the axial FOV are 24.8 and 38.85 cm, respectively 2 and the attached PET-compatible 8 channel transmit/receive coil allows 1 H-MR imaging of the entire head 3. The gantry and the transmit receive coil were optimized for neuroscientific studies on humans with task-based activations and other interventions. A staggered layer scintillation detector design (pixelated) combined with a Maximum Likelihood position algorithm was chosen to obtain isotropic and homogeneous spatial resolution < 2mm throughout the entire PET FOV. The long axial FOV paired with the small PET ring diameter and the 24 mm thick scintillation blocks allow for a peak sensitivity higher than 12%. The system calibration, detailed performance measurements, and first images will be presented.
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