Scalable quantum computing can become a reality with error correction, provided that coherent qubits can be constructed in large arrays1,2. The key premise is that physical errors can remain both ...small and sufficiently uncorrelated as devices scale, so that logical error rates can be exponentially suppressed. However, impacts from cosmic rays and latent radioactivity violate these assumptions. An impinging particle can ionize the substrate and induce a burst of quasiparticles that destroys qubit coherence throughout the device. High-energy radiation has been identified as a source of error in pilot superconducting quantum devices3–5, but the effect on large-scale algorithms and error correction remains an open question. Elucidating the physics involved requires operating large numbers of qubits at the same rapid timescales necessary for error correction. Here, we use space- and time-resolved measurements of a large-scale quantum processor to identify bursts of quasiparticles produced by high-energy rays. We track the events from their initial localized impact as they spread, simultaneously and severely limiting the energy coherence of all qubits and causing chip-wide failure. Our results provide direct insights into the impact of these damaging error bursts and highlight the necessity of mitigation to enable quantum computing to scale.Cosmic rays flying through superconducting quantum devices create bursts of excitations that destroy qubit coherence. Rapid, spatially resolved measurements of qubit error rates make it possible to observe the evolution of the bursts across a chip.
Radiofrequency switches are critical components in wireless communication systems and consumer electronics. Emerging devices include switches based on microelectromechanical systems and phase-change ...materials. However, these devices suffer from disadvantages such as large physical dimensions and high actuation voltages. Here we propose and demonstrate a nanoscale radiofrequency switch based on a memristive device. The device can be programmed with a voltage as low as 0.4 V and has an ON/OFF conductance ratio up to 10(12) with long state retention. We measure the radiofrequency performance of the switch up to 110 GHz and demonstrate low insertion loss (0.3 dB at 40 GHz), high isolation (30 dB at 40 GHz), an average cutoff frequency of 35 THz and competitive linearity and power-handling capability. Our results suggest that, in addition to their application in memory and computing, memristive devices are also a leading contender for radiofrequency switch applications.
Microwaves in Quantum Computing Bardin, Joseph C.; Slichter, Daniel H.; Reilly, David J.
IEEE journal of microwaves,
2021-Jan., 2021-1-00, 20210101, 2021-01-01, Letnik:
1, Številka:
1
Journal Article
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Quantum information processing systems rely on a broad range of microwave technologies and have spurred development of microwave devices and methods in new operating regimes. Here we review the use ...of microwave signals and systems in quantum computing, with specific reference to three leading quantum computing platforms: trapped atomic ion qubits, spin qubits in semiconductors, and superconducting qubits. We highlight some key results and progress in quantum computing achieved through the use of microwave systems, and discuss how quantum computing applications have pushed the frontiers of microwave technology in some areas. We also describe open microwave engineering challenges for the construction of large-scale, fault-tolerant quantum computers.
Implementation of an error-corrected quantum computer is believed to require a quantum processor with a million or more physical qubits, and, in order to run such a processor, a quantum control ...system of similar scale will be required. Such a controller will need to be integrated within the cryogenic system and in close proximity with the quantum processor in order to make such a system practical. Here, we present a prototype cryogenic CMOS quantum controller designed in a 28-nm bulk CMOS process and optimized to implement a 16-word (4-bit) XY gate instruction set for controlling transmon qubits. After introducing the transmon qubit, including a discussion of how it is controlled, design considerations are discussed, with an emphasis on error rates and scalability. The circuit design is then discussed. Cryogenic performance of the underlying technology is presented, and the results of several quantum control experiments carried out using the integrated controller are described. This article ends with a comparison to the state of the art and a discussion of further research to be carried out. It has been shown that the quantum control IC achieves promising performance while dissipating less than 2 mW of total ac and dc power and requiring a digital data stream of less than 500 Mb/s.
The promise of quantum computers is that certain computational tasks might be executed exponentially faster on a quantum processor than on a classical processor
. A fundamental challenge is to build ...a high-fidelity processor capable of running quantum algorithms in an exponentially large computational space. Here we report the use of a processor with programmable superconducting qubits
to create quantum states on 53 qubits, corresponding to a computational state-space of dimension 2
(about 10
). Measurements from repeated experiments sample the resulting probability distribution, which we verify using classical simulations. Our Sycamore processor takes about 200 seconds to sample one instance of a quantum circuit a million times-our benchmarks currently indicate that the equivalent task for a state-of-the-art classical supercomputer would take approximately 10,000 years. This dramatic increase in speed compared to all known classical algorithms is an experimental realization of quantum supremacy
for this specific computational task, heralding a much-anticipated computing paradigm.
Realizing the potential of quantum computing requires sufficiently low logical error rates.sup.1. Many applications call for error rates as low as 10.sup.-15 (refs. .sup.2-9), but state-of-the-art ...quantum platforms typically have physical error rates near 10.sup.-3 (refs. .sup.10-14). Quantum error correction.sup.15-17 promises to bridge this divide by distributing quantum logical information across many physical qubits in such a way that errors can be detected and corrected. Errors on the encoded logical qubit state can be exponentially suppressed as the number of physical qubits grows, provided that the physical error rates are below a certain threshold and stable over the course of a computation. Here we implement one-dimensional repetition codes embedded in a two-dimensional grid of superconducting qubits that demonstrate exponential suppression of bit-flip or phase-flip errors, reducing logical error per round more than 100-fold when increasing the number of qubits from 5 to 21. Crucially, this error suppression is stable over 50 rounds of error correction. We also introduce a method for analysing error correlations with high precision, allowing us to characterize error locality while performing quantum error correction. Finally, we perform error detection with a small logical qubit using the 2D surface code on the same device.sup.18,19 and show that the results from both one- and two-dimensional codes agree with numerical simulations that use a simple depolarizing error model. These experimental demonstrations provide a foundation for building a scalable fault-tolerant quantum computer with superconducting qubits.
Low-power cryogenic low-noise amplifiers (LNAs) are desired to ease the cooling requirements of ultra-sensitive cryogenically cooled instrumentation. In this paper, the tradeoff between power and ...noise performance in silicon-germanium LNAs is explored to study the possibility of operating these devices from low supply voltages. A new small-signal heterojunction bipolar transistor noise model applicable to both the forward-active and saturation regimes is developed from first principles. Experimental measurements of a device across a wide range of temperatures are then presented and the dependence of the noise parameters on collector-emitter voltage is described. This paper concludes with the demonstration of a high-gain 1.8-3.6-GHz cryogenic LNA achieving a noise temperature of 3.4-5 K while consuming just 290 μW when operating at 15-K physical temperature.
Superconducting nanowire single photon detectors are typically biased using a constant current source and shunted in a conductance that is over an order of magnitude larger than the peak normal ...domain conductance of the detector. While this design choice is required to ensure quenching of the normal domain, the use of a small load resistor limits the pulse amplitude, rising-edge slew rate, and recovery time of the detector. Here, we explore the possibility of actively quenching the normal domain, thereby removing the need to shunt the detector in a small resistance. We first consider the theoretical performance of an actively quenched superconducting nanowire single photon detector and, in comparison to a passively quenched device, we predict roughly an order of magnitude improvement in the slew rate and peak voltage achieved in this configuration. The experimental performance of actively and passively quenched superconducting nanowire single photon detectors are then compared. It is shown that, in comparison to a passively quenched device, the actively quenched detectors simultaneously exhibited improved count rates, dark count rates, and timing jitter.
Design of Cryogenic SiGe Low-Noise Amplifiers Weinreb, S.; Bardin, J.C.; Mani, H.
IEEE transactions on microwave theory and techniques,
11/2007, Letnik:
55, Številka:
11
Journal Article
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This paper describes a method for designing cryogenic silicon-germanium (SiGe) transistor low-noise amplifiers and reports record microwave noise temperature, i.e., 2 K, measured at the module ...connector interface with a 50-Omega generator. A theory for the relevant noise sources in the transistor is derived from first principles to give the minimum possible noise temperature and optimum generator impedance in terms of dc measured current gain and transconductance. These measured dc quantities are then reported for an IBM SiGe BiCMOS-8HP transistor at temperatures from 295 to 15 K. The measured and modeled noise and gain for both a single-and two-transistor cascode amplifier in the 0.2-3-GHz range are then presented. The noise model is then combined with the transistor equivalent-circuit elements in a circuit simulator and the noise in the frequency range up to 20 GHz is compared with that of a typical InP HEMT.
A new signal-processing approach aimed at improving the intermodulation performance of wideband receivers implemented in CMOS technologies is described. The receiver operates by downconverting an ...input signal to <inline-formula> <tex-math notation="LaTeX">N </tex-math></inline-formula> decimated baseband signals. The local oscillator signals used in this process are each a different phase of a pseudo-random bit sequence of length <inline-formula> <tex-math notation="LaTeX">N </tex-math></inline-formula>. The baseband signals are amplified and digitized before the original RF signal is reconstructed in the digital domain. The operating principles of the system are described and the performance specifications of this system are studied using a combination of analytical and numerical techniques. A prototype integrated circuit has been designed and fabricated using a 130-nm CMOS process. Detailed measurements demonstrating the narrowband and wideband operation of the system are presented and compared to theory. The measured in-band <inline-formula> <tex-math notation="LaTeX">IIP3 </tex-math></inline-formula> has been found to be greater than 5.7 dBm from 40 to 300 MHz. The blocker tolerance of the circuit has also been characterized and it was found that a 10-MS/s −50-dBm 16-QAM signal could be received with nearly constant error-vector magnitude as the power of an in-band blocker signal was swept from −20 to −7 dBm.
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