Intrapelvic sciatic nerve schwannomas are rare causes for non-discogenic sciatica. We describe a 44-year-old female who had a palpable mass on digital rectal examination that exhibited a positive ...Tinel's sign. The schwannoma was excised by a posterior transgluteal approach. Patients with negative spinal imaging should undergo pelvic scanning to rule out these tumors.
BACKGROUNDUp to 15% of young adults with glioblastoma have the activating oncogenic BRAF V600E mutation, an actionable target of the MAPK signal transduction pathway governing tumor cell ...proliferation. Small molecule inhibitors of BRAF and MEK, a downstream protein immediately following BRAF, have been shown to confer a survival advantage for patients with BRAF V600E mutant advanced melanoma. We describe our experience using this combined target therapy for two patients with BRAFV600E mutant glioblastoma (GBM) as primary treatment due to extenuating clinical circumstances that prohibited the prescription of standard treatment.CASE PRESENTATIONThe two patients were both 22 years old on presentation. After the initial tumor resection, they both developed rapid deterioration in performance status within a few weeks due to leptomeningeal metastases. In view of the critical condition, BRAF and MEK inhibitors were prescribed as first line treatment. The two patients both achieved dramatic clinical response, which was parallel to the impressive radiological regression of the disease. Unfortunately, the duration of disease control was short as drug resistance developed rapidly. The two patients died 7 and 7.5 month after initial diagnosis of GBM.CONCLUSIONSPrimary treatment with inhibitors of BRAF and MEK can lead to tumor regression for patients with BRAF V600E mutant glioblastoma. We therefore recommend that all young GBM patients should undergo BRAFV600E mutation testing, especially for those with unusual aggressive clinical course.
Efficient utilization of Field Programmable Gate Arrays (FPGAs) depends on the ability to determine whether designs will exceed the logic or routing capacities of the devices. Here, we focus on the ...problem of assessing the routability of designs for FPGAs before place-and-route. Specifically, we identify the relevant wireability theories, modify and adapt the theories for FPGAs, and conduct experiments to validate the theories.
A high-speed interface circuit delivering 660MB/s data is implemented as a byte-wide I/O bus-interface cell. The interface contains low-swing input receivers, controlled-current output drivers, and ...clock-recovery circuits. The circuits perform well in noisy environments such as microprocessors, and withstand LdI/dt noise generated in high-inductance packages such as PQFPs. The interface is implemented as a full-custom ASIC library megacell, reducing area and power over gate-array approaches. An advanced CAD methodology is used to easily port the analog circuits and high-speed digital circuits in the interface cell to multiple-fabrication process technologies. The cell is used as an interface for ASIC-to-DRAM communication and for ASIC-to-ASIC communication, for point-to-point links and for bused links.
Hybrid spectral/iterative partitioning Zien, Jason Y; Chan, Pak K; Schlag, Martine
1997 Proceedings of IEEE International Conference on Computer Aided Design (ICCAD),
1997
Conference Proceeding, Journal Article
We develop a new multi-way, hybrid spectral/iterative hypergraph partitioning algorithm that combines the strengths of spectral partitioners and iterative improvement algorithms to create a new class ...of partitioners. We use spectral information (the eigenvectors of a graph) to generate initial partitions, influence the selection of iterative improvement moves, and break out of local minima. Our 3-way and 4-way partitioning results exhibit significant improvement over current published results, demonstrating the effectiveness of our new method. Our hybrid algorithm produces an improvement of 25% over GFM for 3-way partitions, 41% improvement over GFM for 4-way partitions, and 58% improvement over ML/sub F/ for 4-way partitions.
Multi-level spectral hypergraph partitioning with arbitrary vertex sizes Zien, Jason Y.; Schlag, Martine D. F.; Chan, Pak K.
International Conference on Computer Aided Design: Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design; 10-14 Nov. 1996,
01/1997
Conference Proceeding
This paper presents a new spectral partitioning formulation which directly incorporates vertex size information. The new formulation results in a generalized eigenvalue problem, and this problem is ...reduced to the standard eigenvalue problem. Experimental results show that incorporating vertex sizes into the eigenvalue calculation produces results that are 50% better than the standard formulation in terms of scaled ratio-cut cost, even when a Kernighan-Lin style iterative improvement algorithm taking into account vertex sizes is applied as a post-processing step. To evaluate the new method for use in multi-level partitioning, we combine the partitioner with a multi-level bottom-up clustering algorithm and an iterative improvement algorithm for partition refinement. Experimental results show that our new spectral algorithm is more effective than the standard spectral formulation and other partitioners in the multi-level partitioning of hypergraphs.
Spectral-based multi-way FPGA partitioning Chan, Pak K.; Schlag, Martine D. F.; Zien, Jason Y.
International Symposium on Field Programmable Gate Arrays: Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays; 12-14 Feb. 1995,
02/1995
Conference Proceeding
Odprti dostop
Recent research on FPGA partitioning has focussed on finding minimum cuts between partitions without regard to the routability of the partitioned subcircuits. In this paper we develop a spectral ...approach to multi-way partitioning in which the primary goal is to produce routable subcircuits while maximizing FPGA device utilization. To assist the partitioner in assessing the routability of the partitioned subcircuits, we have developed a theory to predict the routability of the partitioned subcircuits prior to partitioning. Advancement over the current work is evidenced by results of experiments on the standard MCNC benchmarks.
Hybrid spectral/iterative partitioning Zien, Jason Y.; Chan, Pak K.; Schlag, Martine
Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design,
11/1997
Conference Proceeding
We develop a new multi-way, hybrid spectral/iterative hypergraph partitioning algorithm that combines the strengths of spectral partitioners and iterative improvement algorithms to create a new class ...of partitioners. We use spectral information (the eigenvectors of a graph) to generate initial partitions, influence the selection of iterative improvement moves, and break out of local minima. Our 3-way and 4-way partitioning results exhibit significant improvement over current published results, demonstrating the effectiveness of our new method. Our hybrid algorithm produces an improvement of 25% over GFM for 3-way partitions, 41% improvement over GFM for 4-way partitions, and 58% improvement over ML_F for 4-way partitions.
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