Initial experience with the CDF SVT trigger Ashmanskas, B.; Barchiesi, A.; Bardi, A. ...
Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment,
03/2003, Letnik:
501, Številka:
1
Journal Article
Recenzirano
Odprti dostop
The Collider Detector at Fermilab (CDF) Silicon Vertex Tracker (SVT) is a device that works inside the CDF Level 2 trigger to find and fit tracks in real time using the central silicon vertex ...detector information. SVT starts from tracks found by the Level 1 central chamber fast trigger and adds the silicon information to compute transverse track parameters with offline quality in about
15
μs
. The CDF SVT is fully installed and functional and has been exercised with real data during the spring and summer 2001. It is a complex digital device of more than 100 VME boards that performs a dramatic data reduction (only about one event in a thousand is accepted by the trigger). Diagnosing rare failures poses a special challenge and SVT internal data flow is monitored by dedicated hardware and software. This paper briefly covers the SVT architecture and design and reports on the SVT building/commissioning experience (hardware and software) and on the first results from the initial running.
Silicon vertex tracker: a fast precise tracking trigger for CDF Ashmanskas, W; Bardi, A; Bari, M ...
Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment,
06/2000, Letnik:
447, Številka:
1
Journal Article
Recenzirano
Odprti dostop
The Silicon Vertex Tracker (SVT), currently being built for the CDF II experiment, is a hardware device that reconstructs 2-D tracks online using measurements from the Silicon Vertex Detector (SVXII) ...and the Central Outer Tracker (COT). The precise measurement of the impact parameter of the SVT tracks will allow, for the first time in a hadron collider environment, to trigger on events containing B hadrons that are very important for many studies, such as CP violation in the b sector and searching for new heavy particles decaying to b
b
̄
. In this report we describe the overall architecture, algorithms and the hardware implementation of the SVT.
SVT: an online Silicon Vertex Tracker for the CDF upgrade Bardi, A.; Belforte, S.; Berryhill, J. ...
Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment,
05/1998, Letnik:
409, Številka:
1-3
Journal Article
Recenzirano
Odprti dostop
The SVT is an online tracker for the CDF upgrade which will reconstruct 2D tracks using information from the Silicon VerteX detector (SVXII) and Central Outer Tracker (COT). The precision measurement ...of the track impact parameter will then be used to select and record large samples of B hadrons. We discuss the overall architecture, algorithms, and hardware implementation of the system.
The online silicon vertex tracker (SVT) is the new trigger processor dedicated to the two-dimensional (2-D) reconstruction of charged particle trajectories at the Level 2 of the Collider Detector at ...Fermilab (CDF) trigger. The SVT links the digitized pulse heights found within the silicon vertex detector to the tracks reconstructed in the central outer tracker by the Level 1 fast-track finder. Preliminary tests of the system took place during the October 2000 commissioning run of the Tevatron Collider. During the April-October 2001 data taking, it was possible to evaluate the performance of the system. In this paper, we review the tracking algorithms implemented in the SVT and we report on the performance achieved during the early phase of run II.
The Merger board is part of the Silicon Vertex Tracker (SVT), a device dedicated to perform real-time track reconstruction with offline-like resolution and high efficiency at the Level 2 trigger of ...the CDF experiment. The Merger is a custom 9U /spl times/ 400 mm VME board, running at an internal clock frequency of 33 MHz. Its main functional task in SVT is to merge up to four independent data streams into a single one. The merging operation can be performed on a first come, first served basis or according to an ordered sequence. There are four input streams and two identical output streams, so that the Merger also serves as a data fanout function. The board implements detailed error handling and sophisticated data monitoring that make it possible to trace back misfunctioning both in the Merger and in other parts of SVT. Furthermore, the Merger has special modes of operation that can be selected for test and diagnostic purposes. In these working modes, the Merger is a powerful tool that allows one to test other SVT boards at their maximum operating frequency.
The CDF silicon vertex tracker Ashmanskas, W; Bardi, A; Bari, M ...
Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment,
01/2002, Letnik:
477, Številka:
1
Journal Article
Recenzirano
Real time pattern recognition is becoming a key issue in many position sensitive detector applications. The CDF collaboration is building SVT: a specialized electronic device designed to perform real ...time track reconstruction using the Silicon VerteX detector (SVX II). This will strongly improve the CDF capability of triggering on events containing b quarks, usually characterized by the presence of a secondary vertex.
SVT is designed to reconstruct in real time charged particles trajectories using data coming from the silicon vertex detector and the central outer tracker drift chamber. The SVT architecture and algorithm have been specially tuned to minimize processing time without degrading parameter resolution.
The online silicon vertex tracker (SVT) is composed of 104 VME 9U digital boards (of eight different types). Since the data output from the SVT (few MB/s) are a small fraction of the input data (200 ...MB/s), it is extremely difficult to track possible internal errors by using only the output stream. For this reason, several diagnostic tools have been implemented: local error registers, error bits propagated through the data streams, and the Spy Buffer system. Data flowing through each input and output stream of every board are continuously copied to memory banks named spy buffers, which act as built-in logic state analyzers hooked continuously to internal data streams. The contents of all buffers can be frozen at any time (e.g., on error detection) to take a snapshot of all data flowing through each SVT board. The spy buffers are coordinated at system level by the Spy Control Board. The architecture, design, and implementation of this system are described.
PDF
