Abstract
The electrosynthesis of formate from CO
2
can mitigate environmental issues while providing an economically valuable product. Although stannic oxide is a good catalytic material for formate ...production, a metallic phase is formed under high reduction overpotentials, reducing its activity. Here, using a fluorine-doped tin oxide catalyst, a high Faradaic efficiency for formate (95% at 100 mA cm
−2
) and a maximum partial current density of 330 mA cm
−2
(at 400 mA cm
−2
) is achieved for the electroreduction of CO
2
. Furthermore, the formate selectivity (≈90%) is nearly constant over 7 days of operation at a current density of 100 mA cm
−2
.
In-situ/operando
spectroscopies reveal that the fluorine dopant plays a critical role in maintaining the high oxidation state of Sn, leading to enhanced durability at high current densities. First-principle calculation also suggests that the fluorine-doped tin oxide surface could provide a thermodynamically stable environment to form HCOO* intermediate than tin oxide surface. These findings suggest a simple and efficient approach for designing active and durable electrocatalysts for the electrosynthesis of formate from CO
2
.
Abstract
Memristors, or memristive devices, have attracted tremendous interest in neuromorphic hardware implementation. However, the high electric-field dependence in conventional filamentary ...memristors results in either digital-like conductance updates or gradual switching only in a limited dynamic range. Here, we address the switching parameter, the reduction probability of Ag cations in the switching medium, and ultimately demonstrate a cluster-type analogue memristor. Ti nanoclusters are embedded into densified amorphous Si for the following reasons: low standard reduction potential, thermodynamic miscibility with Si, and alloy formation with Ag. These Ti clusters effectively induce the electrochemical reduction activity of Ag cations and allow linear potentiation/depression in tandem with a large conductance range (~244) and long data retention (~99% at 1 hour). Moreover, according to the reduction potentials of incorporated metals (Pt, Ta, W, and Ti), the extent of linearity improvement is selectively tuneable. Image processing simulation proves that the Ti
4.8%
:a-Si device can fully function with high accuracy as an ideal synaptic model.
We report the complementary resistive switching (CRS) behaviors in a tantalum-oxide based resistive switching memory device that reversibly changes its switching mode between bipolar switching (BRS) ...and CRS in a single memory cell depending on the operation (compliance current) and fabrication (oxygen scavenger layer thickness) conditions. In addition, the origin of the switching mode transition was investigated through electrical and optical measurement, where the conductance is believed to be determined by two factors: formation of conductive filament and modulation of Schottky barrier. This result helps design a resistive switching device with desirable and stable switching behavior.
Abstract
One long-standing goal in the emerging neuromorphic field is to create a reliable neural network hardware implementation that has low energy consumption, while providing massively parallel ...computation. Although diverse oxide-based devices have made significant progress as artificial synaptic and neuronal components, these devices still need further optimization regarding linearity, symmetry, and stability. Here, we present a proof-of-concept experiment for integrated neuromorphic computing networks by utilizing spintronics-based synapse (spin-S) and neuron (spin-N) devices, along with linear and symmetric weight responses for spin-S using a stripe domain and activation functions for spin-N. An integrated neural network of electrically connected spin-S and spin-N successfully proves the integration function for a simple pattern classification task. We simulate a spin-N network using the extracted device characteristics and demonstrate a high classification accuracy (over 93%) for the spin-S and spin-N optimization without the assistance of additional software or circuits required in previous reports. These experimental studies provide a new path toward establishing more compact and efficient neural network systems with optimized multifunctional spintronic devices.
Among many artificial neural networks, the research on Spike Neural Network (SNN), which mimics the energy-efficient signal system in the brain, is drawing much attention. Memristor is a promising ...candidate as a synaptic component for hardware implementation of SNN, but several non-ideal device properties are making it challengeable. In this work, we conducted an SNN simulation by adding a device model with a non-linear weight update to test the impact on SNN performance. We found that SNN has a strong tolerance for the device non-linearity and the network can keep the accuracy high if a device meets one of the two conditions: 1. symmetric LTP and LTD curves and 2. positive non-linearity factors for both LTP and LTD. The reason was analyzed in terms of the balance between network parameters as well as the variability of weight. The results are considered to be a piece of useful prior information for the future implementation of emerging device-based neuromorphic hardware.
Temporal Learning Using Second-Order Memristors Zidan, Mohammed A.; YeonJoo Jeong; Lu, Wei D.
IEEE transactions on nanotechnology,
2017-July, 2017-7-00, 20170701, Letnik:
16, Številka:
4
Journal Article
Recenzirano
Odprti dostop
Utilizing internal dynamic processes in memristors may allow the devices to process temporal data natively. In this letter, we show the ability of second-order memristors to process information in ...the time domain, and discuss a memristive STDP network that can learn and classify temporal as well as classical data patterns.
Neuromorphic computing research is being actively pursued to address the challenges posed by the need for energy-efficient processing of big data. One of the promising approaches to tackle the ...challenges is the hardware implementation of spiking neural networks (SNNs) with bio-plausible learning rules. Numerous research works have been done to implement the SNN hardware with different synaptic plasticity rules to emulate human brain operations. While a standard spike-timing-dependent-plasticity (STDP) rule is emulated in many SNN hardware, the various STDP rules found in the biological brain have rarely been implemented in hardware. This study proposes a CMOS-memristor hybrid synapse circuit for the hardware implementation of a Ca ion-based plasticity model to emulate the various STDP curves. The memristor was adopted as a memory device in the CMOS synapse circuit because memristors have been identified as promising candidates for analog non-volatile memory devices in terms of energy efficiency and scalability. The circuit design was divided into four sub-blocks based on biological behavior, exploiting the non-volatile and analog state properties of memristors. The circuit was designed to vary weights using an H-bridge circuit structure and PWM modulation. The various STDP curves have been emulated in one CMOS-memristor hybrid circuit, and furthermore a simple neural network operation was demonstrated for associative learning such as Pavlovian conditioning. The proposed circuit is expected to facilitate large-scale operations for neuromorphic computing through its scale-up.
Abstract
Conductive bridging random access memory (CBRAM) has been considered to be a promising emerging device for artificial synapses in neuromorphic computing systems. Good analog synaptic ...behaviors, such as linear and symmetric synapse updates, are desirable to provide high learning accuracy. Although numerous efforts have been made to develop analog CBRAM for years, the stochastic and abrupt formation of conductive filaments hinders its adoption. In this study, we propose a novel approach to enhance the synaptic behavior of a SiN
x
/a-Si bilayer memristor through Ge implantation. The SiN
x
and a-Si layers serve as switching and internal current limiting layers, respectively. Ge implantation induces structural defects in the bulk and surface regions of the a-Si layer, enabling spatially uniform Ag migration and nanocluster formation in the upper SiN
x
layer and increasing the conductance of the a-Si layer. As a result, the analog synaptic behavior of the SiN
x
/a-Si bilayer memristor, such as the nonlinearity, on/off ratio, and retention time, is remarkably improved. An artificial neural network simulation shows that the neuromorphic system with the implanted SiN
x
/a-Si memristor provides a 91.3% learning accuracy mainly due to the improved linearity.
Abstract
Various memristive devices have been proposed for use in neuromorphic computing systems as artificial synapses. Analog synaptic devices with linear conductance updates during training are ...efficiently essential to train neural networks. Although many different analog memristors have been proposed, a more reliable approach to implement analog synaptic devices is needed. In this study, we propose the memristor of a Cu/SiO
x
/implanted a-SiGe
x
/p
++
c-Si structure containing an a-Si layer with properly controlled conductance through Ge implantation. The a-SiGe
x
layer plays a multifunctional role in device operation by limiting the current overshoot, confining the heat generated during operation and preventing the silicide formation reaction between the active metal (Cu) and the Si bottom electrode. Thus, the a-SiGe
x
interface layer enables the formation of multi-weak filaments and induces analog switching behaviors. The TEM observation shows that the insertion of the a-SiGe
x
layer between SiO
x
and c-Si remarkably suppresses the formation of copper silicide, and reliable set/reset operations are secured. The origin of the analog switching behaviors is discussed by analyzing current-voltage characteristics and electron microscopy images. Finally, the memristive-neural network simulations show that our developed memristive devices provide high learning accuracy and are promising in future neuromorphic computing hardware.
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