Traditional snapshot hyperspectral imaging systems include various optical elements: a dispersive optical element (prism), a coded aperture, several relay lenses, and an imaging lens, resulting in an ...impractically large form factor. We seek an alternative, minimal form factor of snapshot spectral imaging based on recent advances in diffractive optical technology. We thereupon present a compact, diffraction-based snapshot hyperspectral imaging method, using only a novel diffractive optical element (DOE) in front of a conventional, bare image sensor. Our diffractive imaging method replaces the common optical elements in hyperspectral imaging with a single optical element. To this end, we tackle two main challenges: First, the traditional diffractive lenses are not suitable for color imaging under incoherent illumination due to severe chromatic aberration because the size of the point spread function (PSF) changes depending on the wavelength. By leveraging this wavelength-dependent property alternatively for hyperspectral imaging, we introduce a novel DOE design that generates an anisotropic shape of the spectrally-varying PSF. The PSF size remains virtually unchanged, but instead the PSF shape rotates as the wavelength of light changes. Second, since there is no dispersive element and no coded aperture mask, the ill-posedness of spectral reconstruction increases significantly. Thus, we propose an end-to-end network solution based on the unrolled architecture of an optimization procedure with a spatial-spectral prior, specifically designed for deconvolution-based spectral reconstruction. Finally, we demonstrate hyperspectral imaging with a fabricated DOE attached to a conventional DSLR sensor. Results show that our method compares well with other state-of-the-art hyperspectral imaging methods in terms of spectral accuracy and spatial resolution, while our compact, diffraction-based spectral imaging method uses only a single optical element on a bare image sensor.
The objective of polarization rendering is to simulate the interaction of light with materials exhibiting polarization-dependent behavior. However, integrating polarization into rendering is ...challenging and increases computational costs significantly. The primary difficulty lies in efficiently modeling and computing the complex reflection phenomena associated with polarized light. Specifically, frequency-domain analysis, essential for efficient environment lighting and storage of complex light interactions, is lacking. To efficiently simulate and reproduce polarized light interactions using frequency-domain techniques, we address the challenge of maintaining continuity in polarized light transport represented by Stokes vectors within angular domains. The conventional spherical harmonics method cannot effectively handle continuity and rotation invariance for Stokes vectors. To overcome this, we develop a new method called polarized spherical harmonics (PSH) based on the spin-weighted spherical harmonics theory. Our method provides a rotation-invariant representation of Stokes vector fields. Furthermore, we introduce frequency domain formulations of polarized rendering equations and spherical convolution based on PSH. We first define spherical convolution on Stokes vector fields in the angular domain, and it also provides efficient computation of polarized light transport, nearly on an entry-wise product in the frequency domain. Our frequency domain formulation, including spherical convolution, led to the development of the first real-time polarization rendering technique under polarized environmental illumination, named precomputed polarized radiance transfer, using our polarized spherical harmonics. Results demonstrate that our method can effectively and accurately simulate and reproduce polarized light interactions in complex reflection phenomena, including polarized environmental illumination and soft shadows.
Recent differentiable rendering techniques have become key tools to tackle many inverse problems in graphics and vision. Existing models, however, assume steady-state light transport, i.e., infinite ...speed of light. While this is a safe assumption for many applications, recent advances in ultrafast imaging leverage the wealth of information that can be extracted from the exact time of flight of light. In this context, physically-based transient rendering allows to efficiently simulate and analyze light transport considering that the speed of light is indeed finite. In this paper, we introduce a novel differentiable transient rendering framework, to help bring the potential of differentiable approaches into the transient regime. To differentiate the transient path integral we need to take into account that scattering events at path vertices are no longer independent; instead, tracking the time of flight of light requires treating such scattering events at path vertices jointly as a multidimensional, evolving manifold. We thus turn to the generalized transport theorem, and introduce a novel correlated importance term, which links the time-integrated contribution of a path to its light throughput, and allows us to handle discontinuities in the light and sensor functions. Last, we present results in several challenging scenarios where the time of flight of light plays an important role such as optimizing indices of refraction, non-line-of-sight tracking with nonplanar relay walls, and non-line-of-sight tracking around two corners.
This paper presents a 4.4Gbps/pin all-digital LPDDR4 PHY with a bit-slice architecture in 10nm FinFET process technology. The proposed bit-slice architecture includes new I/O structure for area ...reduction without any off-chip performance degradation and digital duty-tuning capability to maximize the valid window margin, which contributes to low voltage operation in memory interface system. The test chip in 10nm FinFET technology demonstrated stable 4.4Gbps memory access with 112ps valid window margin (49% UI) at 690mV. The implemented 16-bit LPDDR4 PHY occupies only 0.57 mm 2 including a PLL.
This article presents a high-speed all-digital third-generation high-bandwidth memory (HBM3) interface that achieves reliable memory access at a rate of 9.0 Gb/s/pin at 0.66 and 0.30 V supply ...voltages. To enhance the access reliability, the interface uses resistor-tuned offset calibration and in situ margin detection techniques; furthermore, a supply noise adaptation algorithm, coupled with a high-accuracy digital delay sensor, significantly enhances voltage stability and mitigates the degradation of the valid window margin (VWM) under supply voltage variations. Additionally, the use of stacked-I/O and folded-PHY concepts in the HBM3 interface results in an optimal area, enabling seamless alignment with the HBM3 channel structure and effectively minimizing the length of the channels. To demonstrate the effectiveness of the suggested interface, a HBM3 system was implemented with a 4-nm fin field-effect transistor (FinFET) technology. This implementation showcases the outstanding energy efficiency of the HBM3 interface, 0.29 pJ/bit, with an improved supply of noise-tolerance while occupying a small area. This work highlights the promising potential of the proposed all-digital HBM3 interface for enabling high-speed memory access in high-performance computing (HPC)/artificial intelligence (AI) computing systems.
A Class-D amplifier (CDA) is best suitable for audio mobile applications due to its high-power efficiency, thus enabling to remove a bulky heat sink. A traditional Class-D amplifier uses a 2-level ...output switching scheme. There typically exist an external LC filter and a bulky capacitor to block a DC average current and to protect the speaker from the current, which increases the bill of materials. As a remedy, a 3-level switching scheme allows to eliminate the filters, hence helping to reduce the system cost. Moreover, the 3-level switching scheme provides additional benefits of less electromagnetic interference and better power efficiency. The 3-level approach prevails with the help of various modulation techniques such as a pulse-width modulation (PWM) 1,2, a sliding-mode control 3, and a uniform PWM 4 method.
Despite advances in display technology, many existing applications rely on psychophysical datasets of human perception gathered using older, sometimes outdated displays. As a result, there exists the ...underlying assumption that such measurements can be carried over to the new viewing conditions of more modern technology. We have conducted a series of psychophysical experiments to explore contrast sensitivity using a state‐of‐the‐art HDR display, taking into account not only the spatial frequency and luminance of the stimuli but also their surrounding luminance levels. From our data, we have derived a novel surround‐aware contrast sensitivity function (CSF), which predicts human contrast sensitivity more accurately. We additionally provide a practical version that retains the benefits of our full model, while enabling easy backward compatibility and consistently producing good results across many existing applications that make use of CSF models. We show examples of effective HDR video compression using a transfer function derived from our CSF, tone‐mapping and improved accuracy in visual difference prediction.
Despite advances in display technology, many existing applications rely on psychophysical datasets of human perception gathered using older, sometimes outdated displays.
A critical performance bottleneck for memory-bound applications such as high-performance computing (HPC), artificial intelligence (AI), and machine learning (ML) applications is the limited memory ...bandwidth 1. An HBM3 DRAM interface, based on a WDQS-clocking scheme with high-speed low-voltage-swing terminated logic (LVSTL) I/O, is a promising energy-efficient high-bandwidth solution. The WDQS-clocking scheme is expected to improve the read-valid-window margin (VWM), which is a major limiting factor in achieving DRAM access reliability at high speed. However, the long turn-around read path limits the read VWM improvement. In addition, it is essential to minimize interface area for clustered channel implementations by considering controllers, processing units and bus interconnects. Memory-access latency can be minimized by the close placement of functional units to the HBM3 interface.
Recent emerging applications, such as autonomous vehicles, artificial intelligence, and deep learning, require a large amount of data computation. The GDDR6 interface is a candidate solution because ...it can operate up to 64GB/s (16Gb/s/pin x 32 pins) with a lower cost than HBM. To communicate with GDDR6 DRAM 1, 2 the GDDR6 PHY requires high-speed signaling and, more importantly, read/write calibration for optimal margins. In this work, to transmit 18Gb/s data, while meeting the required GDDR6 I/O 1.35V supply, a thin-oxide high-voltage output driver 3 is used with a high-speed level shifter. A dual-mode equalizer is developed in the transmitter to selectively compensate for intersymbol interference (ISI) and far-end crosstalk (FEXT). For an accurate clock-phase calibration and a reduced optimal-reference-voltage search time a simultaneous calibration of clock phase and reference voltage (V REF ) is proposed in receiver. Multiphase gate training is proposed to create an internal source synchronous clock with finite cycles whose 1st rising edge is aligned to the 1st bit of read burst. Then, only valid 16b of a burst data are taken without a post processing.
Utilization of an ultrasound tracking system in wireless sensor networks is a well-known technique with low-cost and high-accuracy advantages in an indoor environment. In this paper, we present the ...implementation of an active tracking system based on an ultrasonic sensing device using the IEEE 802.15.4 compatible radio. IEEE 802.15.4 is used in wireless sensor networks because of its low power consumption and high bit-rate. Many of the technical issues for actual deployment of the system in an indoor environment are herein analyzed and solved.
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