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  • A CMOS spectrum analyzer fr...
    Oude Alink, M. S.; Klumperink, E. A. M.; Kokkeler, A. B. J.; Wei Cheng; Zhiyu Ru; Ghaffari, A.; Wienk, G. J. M.; Nauta, B.

    2012 IEEE Radio Frequency Integrated Circuits Symposium, 2012-June
    Conference Proceeding

    A dual RF-receiver preceded by discrete-step attenuators is implemented in 65nm CMOS and operates from 0.3-1.0 GHz. The noise of the receivers is reduced by cross-correlating the two receiver outputs in the digital baseband, allowing attenuation of the RF input signal to increase linearity. With this technique a displayed average noise level below -169 dBm/Hz is obtained with +25 dBm IIP 3 , giving a spurious-free dynamic range of 89 dB in 1 MHz resolution bandwidth.