While quantum processors are typically cooled to \lt 25 mK to avoid thermal disturbances to their delicate quantum states, all qubits still suffer decoherence and gate errors. As such, quantum error correction is needed to fully harness the power of quantum computing (QC). Current projections indicate that \gt 1,000 physical qubits will be required to encode one error-corrected qubit 1. Implementing a system with 1,000 error-corrected qubits will likely require moving from the contemporary paradigm where control and readout of the quantum processor is carried out using racks of room temperature electronics to one in which integrated control/readout circuits are located within the cryogenic environment and connected to the quantum processor through superconducting interconnects 2. This is a major challenge, as the cryo ICs must be high performance and very low power (eventually \lt 1 mW/qubit). In this paper, we report the design and system-level characterization of a prototype cryo-CMOS IC for performing XY gate operations on transmon (XMON) qubits.