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  • Track finding based on Associative Memories for Level-1 triggering in HL-LHC experiments
    Magazzu, G.; Biesuz, N.; Bilei, G. M.; Crescioli, F.; Fedi, G.; Gentsos, C.; Magalotti, D.; Palla, F.; Servoli, L.

    2016 5th International Conference on Modern Circuits and Systems Technologies (MOCAST), 05/2016
    Conference Proceeding

    The increase of the luminosity in the High Luminosity upgrade of the CERN Large Hadron Collider (HL-LHC) will require the use of Tracker information in the evaluation of the Level-1 trigger in order to keep the trigger rate acceptable (i.e.: <; 1MHz). A custom real-time system will be needed to extract the track information within the latency constraints (<;10usec). We developed the prototype of the building block of this system, the Pattern Recognition Mezzanine (PRM) that combines the power of both Associative Memory custom ASICs and modern FPGA devices. The architecture and the functionalities of the PRM are described here.

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