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Chen, You-Shin; Hsu, Tzu-Hsiang; Chen, Chien-Wen; Hsieh, Chih-Cheng
2019 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2019-AprilConference Proceeding
This paper presents a high speed low noise CMOS imager for optical linear encoder. Dual sensor arrays and the corresponding readout circuit are implemented for incremental and absolute encoded light signal, respectively. For incremental signal, current-mode differential sensing (CMDS) frontend with buffered direct injection (BDI) is proposed for DC cancellation and high response bandwidth. Transimpedance amplifier (TIA) is implemented for current-to-voltage conversion with low-pass filtering function for noise reduction. Programmable amplifier (PGA) is implemented for single-to-differential conversion and full-range fitting for the following 12-bit SAR analog-to-digital converter (ADC). For absolute signal, 42 pixels with the corresponding dual-threshold quantizer are implemented. This work achieves a SNR of 63.4dB, a phase error of 33.8 degree at 3.3MHz incremental input.
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Leto | Faktor vpliva | Izdaja | Kategorija | Razvrstitev | ||||
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JCR | SNIP | JCR | SNIP | JCR | SNIP | JCR | SNIP |
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