The LHCb experiment, presently under construction at CERN (European Center for Nuclear Research) Large Hadron Collider (LHC), aims at the study of CP violation in the B meson sector. Its key elements will be a muon detector which allows triggering and muon identification from inclusive b decays. The electronic system of the whole detector is very complex and its muon detector experiment control system (ECS) allows monitoring and control of a number of front-end (FE) boards in excess of 7000. The services board (SB) system is in charge of controlling muon detector FE electronics. It consists of 10 crates of equipment (6U height); each crate contains two kinds of modules: a pulse distribution module (PDM) and up to 20 SBs connected via a custom backplane. The PDM is used to generate and distribute a low jitter synchronous test pulse in a chosen phase relation with the LHC machine clock, for timing alignment of the detector FE, a 40 MHz clock signal synchronous with LHC operation , and it allows distribution of 4 CANbus branches as well as routing of special messages to each SB using a custom data bus available on its backplane. A SB makes possible monitoring and control of FE circuitry, as well as communication between FE electronics and the external world. Four embedded local monitor board (ELMB) modules, based on an 8-bit microcontroller (Atmel ATMegal28), running customized firmware are hosted by one SB; they allow communication via twelve serial links with FE cards and are able to communicate with each other using their on-board links. Each SB controls 96 FE boards or, in other words, 1536 channels. One SB crate contains up to 80 microcontrollers, which can adjust and monitor operation of up to 30720 FE channels. This work depicts the hardware architecture of each module, up to a complete system overview, also covering in detail those aspects of electronics design of equipment functioning in a radiation environment.