E-viri
-
Shibatani, S.; Kinoshita, K.
Proceedings First Asian Test Symposium (ATS `92), 1992Conference Proceeding
A method for synthesizing sequential circuits with testability in the level of state transition table is proposed. The state transition table is augmented by adding extra two inputs so that it possesses a distinguishing sequence, a synchronizing sequence, and transfer sequences of short length. By using suitable state assignment codes sequential circuits with shorter test sequences and with fewer gates are realized. Some experimental results for small benchmark circuits are shown.< >
