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Suhane, A.; Cacciato, A.; Richard, O.; Arreghini, A.; Adelmann, C.; Swerts, J.; Rothschild, O.; Van den bosch, G.; Breuil, L.; Bender, H.; Jurczak, M.; Debusschere, I.; Kittl, J.A.; De Meyer, K.; Van Houdt, J.
Solid-state electronics, 11/2011, Letnik: 65-66Journal Article, Conference Proceeding
In this paper, we provide evaluation of memory stacks with La, Lu and Gd aluminates as charge trapping materials. Critical integration issues are pointed out, particularly the mixing of these materials with adjacent layers. It is found that, in order to control the mixing of the aluminates with the tunnel oxide, nitride (for Gd) or nitride+oxide (for La and Lu) buffer layers have to be used. The nitride buffer layer, however, mixes with the tunnel oxide during stack fabrication. This results in very good erase and endurance performance, which is attributed to enhanced hole tunneling from the Si substrate, but degrades the retention performance.
