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Vincent, B.; Shimura, Y.; Takeuchi, S.; Nishimura, T.; Eneman, G.; Firrincieli, A.; Demeulemeester, J.; Vantomme, A.; Clarysse, T.; Nakatsuka, O.; Zaima, S.; Dekoster, J.; Caymax, M.; Loo, R.
Microelectronic engineering, 04/2011, Letnik: 88, Številka: 4Journal Article, Conference Proceeding
In order to outperform current uniaxial compressively strained Silicon channel pMOSFET technology (with embedded SiGe source/drain), switching to strained Ge channel is mandatory. GeSn materials, having larger lattice parameter than Ge, are proposed in this article as embedded source/drain stressors for Ge channels. Our simulation results indicate that a minimum of 5% Sn is required in the GeSn source/drain to build a competitive strained Ge pMOSFETs with respect to strained Si channels. Therefore the compatibility of GeSn (with 2–8% Sn) materials with source/drain engineering processes (B implantation and activation and NiGeSn formation) has been studied. A low thermal budget has been determined for those processes on GeSn alloys: temperatures must be lower than 600 °C for B activation and lower than 450 °C for NiGeSn formation.
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JCR | SNIP | JCR | SNIP | JCR | SNIP | JCR | SNIP |
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in: SICRIS
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