This paper presents a monolithic optical encoder using CMOS image sensor (CIS) with background light cancellation. Both the absolute and incremental encoders are designed and fabricated on the same chip with dual photodiode arrays and the corresponding readout circuits. The absolute encoder is implemented using 42 columns of pixel with adjustable dual-threshold quantizer. The incremental encoder is implemented using the developed common-centroid interlacing (CCI) photodiode (PD) arrangement for the sensing of four quadrature sinusoidal signal with a 90° phase shift to each other. A fully-differential transimpedance amplifier (FDTIA) with current-mode subtraction (CMS) is proposed to achieve the common-mode signal rejection and background light cancellation. With the implemented CCI PD array, CMS FDTIA, programmable gain amplifiers (PGA), and 12-b SAR ADCs, the prototype achieves a SNR of 60dB, a total power of 10mW, and the maximum displacement error of 0.22μm. Compared to the reported work 5, it achieves a SNR improvement of 15dB, a 2× power reduction, and a 2× accuracy.